diff mbox series

drm/i915: Add missing HDMI audio pixel clocks for gen12

Message ID 20200127113909.11263-1-kai.vehmanen@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Add missing HDMI audio pixel clocks for gen12 | expand

Commit Message

Kai Vehmanen Jan. 27, 2020, 11:39 a.m. UTC 
Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
and 593.4/594Mhz. Add the missing rates and add logic to ignore
them if running on older hardware.

Bspec: 49333
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_audio.c | 16 +++++++++++++---
 drivers/gpu/drm/i915/i915_reg.h            |  4 ++++
 2 files changed, 17 insertions(+), 3 deletions(-)

Comments

Ville Syrjälä Jan. 27, 2020, 1:27 p.m. UTC | #1 
On Mon, Jan 27, 2020 at 01:39:09PM +0200, Kai Vehmanen wrote:
> Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
> and 593.4/594Mhz. Add the missing rates and add logic to ignore
> them if running on older hardware.
> 
> Bspec: 49333
> Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_audio.c | 16 +++++++++++++---
>  drivers/gpu/drm/i915/i915_reg.h            |  4 ++++
>  2 files changed, 17 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index b18040793d9e..78f744d220da 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -148,6 +148,10 @@ static const struct {
>  	{ 74250, AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 },
>  	{ 148352, AUD_CONFIG_PIXEL_CLOCK_HDMI_148352 },
>  	{ 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 },
> +	{ 296703, AUD_CONFIG_PIXEL_CLOCK_HDMI_296703 },
> +	{ 297000, AUD_CONFIG_PIXEL_CLOCK_HDMI_297000 },
> +	{ 593407, AUD_CONFIG_PIXEL_CLOCK_HDMI_593407 },
> +	{ 594000, AUD_CONFIG_PIXEL_CLOCK_HDMI_594000 },
>  };
>  
>  /* HDMI N/CTS table */
> @@ -231,13 +235,19 @@ static const struct hdmi_aud_ncts hdmi_aud_ncts_36bpp[] = {
>  };
>  
>  /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
> -static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)
> +static u32 audio_config_hdmi_pixel_clock(struct drm_i915_private *dev_priv,
> +					 const struct intel_crtc_state *crtc_state)
>  {
>  	const struct drm_display_mode *adjusted_mode =
>  		&crtc_state->hw.adjusted_mode;
>  	int i;
>  
>  	for (i = 0; i < ARRAY_SIZE(hdmi_audio_clock); i++) {
> +		if (INTEL_GEN(dev_priv) < 12 &&
> +		    hdmi_audio_clock[i].clock > 148500) {

Might be cleaner to do the check after the loop.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +			i = ARRAY_SIZE(hdmi_audio_clock);
> +			break;
> +		}
>  		if (adjusted_mode->crtc_clock == hdmi_audio_clock[i].clock)
>  			break;
>  	}
> @@ -433,7 +443,7 @@ hsw_hdmi_audio_config_update(struct intel_encoder *encoder,
>  	tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
>  	tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
>  	tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
> -	tmp |= audio_config_hdmi_pixel_clock(crtc_state);
> +	tmp |= audio_config_hdmi_pixel_clock(dev_priv, crtc_state);
>  
>  	n = audio_config_hdmi_get_n(crtc_state, rate);
>  	if (n != 0) {
> @@ -673,7 +683,7 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder,
>  	if (intel_crtc_has_dp_encoder(crtc_state))
>  		tmp |= AUD_CONFIG_N_VALUE_INDEX;
>  	else
> -		tmp |= audio_config_hdmi_pixel_clock(crtc_state);
> +		tmp |= audio_config_hdmi_pixel_clock(dev_priv, crtc_state);
>  	I915_WRITE(aud_config, tmp);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6cc55c103f67..61d9d045b2ff 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9241,6 +9241,10 @@ enum {
>  #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_74250	(7 << 16)
>  #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148352	(8 << 16)
>  #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148500	(9 << 16)
> +#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_296703	(10 << 16)
> +#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_297000	(11 << 16)
> +#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_593407	(12 << 16)
> +#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_594000	(13 << 16)
>  #define   AUD_CONFIG_DISABLE_NCTS		(1 << 3)
>  
>  /* HSW Audio */
> -- 
> 2.17.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Kai Vehmanen Jan. 27, 2020, 5:01 p.m. UTC | #2 
Hi,

On Mon, 27 Jan 2020, Ville Syrjälä wrote:

> On Mon, Jan 27, 2020 at 01:39:09PM +0200, Kai Vehmanen wrote:
> > Gen12 hardware supports HDMI audio pixel clocks of 296.7/297Mhz
> > and 593.4/594Mhz. Add the missing rates and add logic to ignore
> > them if running on older hardware.
[...]
> >  	for (i = 0; i < ARRAY_SIZE(hdmi_audio_clock); i++) {
> > +		if (INTEL_GEN(dev_priv) < 12 &&
> > +		    hdmi_audio_clock[i].clock > 148500) {
> 
> Might be cleaner to do the check after the loop.

hmm, you are right. I'll wait for the CI results to come in and if nothing 
else found, I'll post V2 with the check moved outside the loop.

Thanks for the review Ville!

Br, Kai
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
index b18040793d9e..78f744d220da 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -148,6 +148,10 @@  static const struct {
 	{ 74250, AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 },
 	{ 148352, AUD_CONFIG_PIXEL_CLOCK_HDMI_148352 },
 	{ 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 },
+	{ 296703, AUD_CONFIG_PIXEL_CLOCK_HDMI_296703 },
+	{ 297000, AUD_CONFIG_PIXEL_CLOCK_HDMI_297000 },
+	{ 593407, AUD_CONFIG_PIXEL_CLOCK_HDMI_593407 },
+	{ 594000, AUD_CONFIG_PIXEL_CLOCK_HDMI_594000 },
 };
 
 /* HDMI N/CTS table */
@@ -231,13 +235,19 @@  static const struct hdmi_aud_ncts hdmi_aud_ncts_36bpp[] = {
 };
 
 /* get AUD_CONFIG_PIXEL_CLOCK_HDMI_* value for mode */
-static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state)
+static u32 audio_config_hdmi_pixel_clock(struct drm_i915_private *dev_priv,
+					 const struct intel_crtc_state *crtc_state)
 {
 	const struct drm_display_mode *adjusted_mode =
 		&crtc_state->hw.adjusted_mode;
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(hdmi_audio_clock); i++) {
+		if (INTEL_GEN(dev_priv) < 12 &&
+		    hdmi_audio_clock[i].clock > 148500) {
+			i = ARRAY_SIZE(hdmi_audio_clock);
+			break;
+		}
 		if (adjusted_mode->crtc_clock == hdmi_audio_clock[i].clock)
 			break;
 	}
@@ -433,7 +443,7 @@  hsw_hdmi_audio_config_update(struct intel_encoder *encoder,
 	tmp &= ~AUD_CONFIG_N_VALUE_INDEX;
 	tmp &= ~AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK;
 	tmp &= ~AUD_CONFIG_N_PROG_ENABLE;
-	tmp |= audio_config_hdmi_pixel_clock(crtc_state);
+	tmp |= audio_config_hdmi_pixel_clock(dev_priv, crtc_state);
 
 	n = audio_config_hdmi_get_n(crtc_state, rate);
 	if (n != 0) {
@@ -673,7 +683,7 @@  static void ilk_audio_codec_enable(struct intel_encoder *encoder,
 	if (intel_crtc_has_dp_encoder(crtc_state))
 		tmp |= AUD_CONFIG_N_VALUE_INDEX;
 	else
-		tmp |= audio_config_hdmi_pixel_clock(crtc_state);
+		tmp |= audio_config_hdmi_pixel_clock(dev_priv, crtc_state);
 	I915_WRITE(aud_config, tmp);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6cc55c103f67..61d9d045b2ff 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9241,6 +9241,10 @@  enum {
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_74250	(7 << 16)
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148352	(8 << 16)
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148500	(9 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_296703	(10 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_297000	(11 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_593407	(12 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_594000	(13 << 16)
 #define   AUD_CONFIG_DISABLE_NCTS		(1 << 3)
 
 /* HSW Audio */