| Message ID | 20200203124735.365-5-vandita.kulkarni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for mipi dsi cmd mode | expand |
On Mon, 03 Feb 2020, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote: > If the GOP has programmed periodic command mode, > we need to disable that which would need a > deconfigure and configure sequence. > > v2: Fix sparse error, pass only intel_dsi (Jani) > > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c > index 04df45d627b2..776d9feb8481 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -1419,6 +1419,22 @@ static void gen11_dsi_get_timings(struct intel_encoder *encoder, > adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal; > } > > +static bool gen11_dsi_is_periodic_cmd_mode(struct intel_dsi *intel_dsi) > +{ > + struct drm_device *dev = intel_dsi->base.base.dev; > + struct drm_i915_private *dev_priv = to_i915(dev); > + enum transcoder dsi_trans; > + u32 val; > + > + if (intel_dsi->ports == BIT(PORT_B)) > + dsi_trans = TRANSCODER_DSI_1; > + else > + dsi_trans = TRANSCODER_DSI_0; > + > + val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans)); intel_de_read(). > + return (val & DSI_PERIODIC_FRAME_UPDATE_ENABLE); > +} > + > static void gen11_dsi_get_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config) > { > @@ -1439,6 +1455,10 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, > gen11_dsi_get_timings(encoder, pipe_config); > pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); > pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); > + > + if (gen11_dsi_is_periodic_cmd_mode(intel_dsi)) > + pipe_config->hw.adjusted_mode.private_flags |= > + I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE; > } > > static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder, > @@ -1522,6 +1542,10 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, > > pipe_config->port_clock = afe_clk(encoder, pipe_config) / 5; > > + /* We would not operate in periodic command mode */ > + pipe_config->hw.adjusted_mode.private_flags &= > + ~I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE; > + > return 0; > }
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index 04df45d627b2..776d9feb8481 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -1419,6 +1419,22 @@ static void gen11_dsi_get_timings(struct intel_encoder *encoder, adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vtotal; } +static bool gen11_dsi_is_periodic_cmd_mode(struct intel_dsi *intel_dsi) +{ + struct drm_device *dev = intel_dsi->base.base.dev; + struct drm_i915_private *dev_priv = to_i915(dev); + enum transcoder dsi_trans; + u32 val; + + if (intel_dsi->ports == BIT(PORT_B)) + dsi_trans = TRANSCODER_DSI_1; + else + dsi_trans = TRANSCODER_DSI_0; + + val = I915_READ(DSI_TRANS_FUNC_CONF(dsi_trans)); + return (val & DSI_PERIODIC_FRAME_UPDATE_ENABLE); +} + static void gen11_dsi_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config) { @@ -1439,6 +1455,10 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, gen11_dsi_get_timings(encoder, pipe_config); pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); + + if (gen11_dsi_is_periodic_cmd_mode(intel_dsi)) + pipe_config->hw.adjusted_mode.private_flags |= + I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE; } static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder, @@ -1522,6 +1542,10 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, pipe_config->port_clock = afe_clk(encoder, pipe_config) / 5; + /* We would not operate in periodic command mode */ + pipe_config->hw.adjusted_mode.private_flags &= + ~I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE; + return 0; }