diff mbox series

[6/7] drm/i915: Add WARN_ON in intel_get_crtc_for_pipe()

Message ID 20200204112927.17391-7-anshuman.gupta@intel.com (mailing list archive)
State New, archived
Headers show
Series 3 display pipes combination system support | expand

Commit Message

Gupta, Anshuman Feb. 4, 2020, 11:29 a.m. UTC 
Add a WARN_ON for a disabled pipe in pipe_mask at
intel_get_crtc_for_pipe() function.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 1f295c89061a..ecbdf4d2ab0a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1432,6 +1432,8 @@  intel_get_first_crtc(struct drm_i915_private *dev_priv)
 static inline struct intel_crtc *
 intel_get_crtc_for_pipe(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
+	/* pipe_to_crtc_mapping may have hole on any of 3 display pipe system */
+	WARN_ON(!(INTEL_INFO(dev_priv)->pipe_mask & BIT(pipe)));
 	return dev_priv->pipe_to_crtc_mapping[pipe];
 }