From patchwork Wed Feb 5 15:41:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gwan-gyeong Mun X-Patchwork-Id: 11366501 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4E8D3112B for ; Wed, 5 Feb 2020 15:41:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 37E0A20730 for ; Wed, 5 Feb 2020 15:41:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 37E0A20730 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6A3256F625; Wed, 5 Feb 2020 15:41:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id F2DDC6F618; Wed, 5 Feb 2020 15:41:42 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Feb 2020 07:41:42 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,406,1574150400"; d="scan'208";a="224950127" Received: from helsinki.fi.intel.com ([10.237.66.164]) by fmsmga007.fm.intel.com with ESMTP; 05 Feb 2020 07:41:41 -0800 From: Gwan-gyeong Mun To: intel-gfx@lists.freedesktop.org Date: Wed, 5 Feb 2020 17:41:21 +0200 Message-Id: <20200205154137.1202389-2-gwan-gyeong.mun@intel.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200205154137.1202389-1-gwan-gyeong.mun@intel.com> References: <20200205154137.1202389-1-gwan-gyeong.mun@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 01/17] drm: add DP 1.4 VSC SDP Payload related enums and a structure X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-fbdev@vger.kernel.org, dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" It adds new enumeration definitions for VSC SDP Payload for Pixel Encoding/Colorimetry Format. And it adds a new drm data structure for DP VSC SDP. enum dp_colorspace and enum dp_colorimetry correspond "Pixel Encoding and Colorimetry Formats". enum dp_dynamic_range corresponds "Dynamic Range". And enum dp_content_type corresponds "Content Type" All of them are based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18]. v3: Add a new drm data structure for DP VSC SDP Signed-off-by: Gwan-gyeong Mun --- include/drm/drm_dp_helper.h | 57 +++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 262faf9e5e94..c098727681fa 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1209,6 +1209,63 @@ struct dp_sdp { #define EDP_VSC_PSR_UPDATE_RFB (1<<1) #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) +/* Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] */ +enum dp_colorspace { + DP_COLORSPACE_RGB = 0, + DP_COLORSPACE_YUV444 = 0x1, + DP_COLORSPACE_YUV422 = 0x2, + DP_COLORSPACE_YUV420 = 0x3, + DP_COLORSPACE_Y_ONLY = 0x4, + DP_COLORSPACE_RAW = 0x5, + DP_COLORSPACE_RESERVED = 0x6, +}; + +/** + * Based on DP 1.4 spec [Table 2-117: VSC SDP Payload for DB16 through DB18] + * and a name of enum member followes DRM_MODE_COLORIMETRY definition. + */ +enum dp_colorimetry { + DP_COLORIMETRY_DEFAULT = 0, /* sRGB (IEC 61966-2-1) / ITU-R BT.601 */ + DP_COLORIMETRY_RGB_WIDE_FIXED = 0x1, + DP_COLORIMETRY_BT709_YCC = 0x1, + DP_COLORIMETRY_RGB_WIDE_FLOAT = 0x2, + DP_COLORIMETRY_XVYCC_601 = 0x2, + DP_COLORIMETRY_OPRGB = 0x3, + DP_COLORIMETRY_XVYCC_709 = 0x3, + DP_COLORIMETRY_DCI_P3_RGB = 0x4, + DP_COLORIMETRY_SYCC_601 = 0x4, + DP_COLORIMETRY_RGB_CUSTOM = 0x5, + DP_COLORIMETRY_OPYCC_601 = 0x5, + DP_COLORIMETRY_BT2020_RGB = 0x6, + DP_COLORIMETRY_BT2020_CYCC = 0x6, + DP_COLORIMETRY_BT2020_YCC = 0x7, +}; + +enum dp_dynamic_range { + DP_DYNAMIC_RANGE_VESA = 0, + DP_DYNAMIC_RANGE_CTA = 1, +}; + +enum dp_content_type { + DP_CONTENT_TYPE_NOT_DEFINED = 0x00, + DP_CONTENT_TYPE_GRAPHICS = 0x01, + DP_CONTENT_TYPE_PHOTO = 0x02, + DP_CONTENT_TYPE_VIDEO = 0x03, + DP_CONTENT_TYPE_GAME = 0x04, +}; + +/* DRM DP VSC SDP as per DP 1.4 spec */ +struct drm_dp_vsc_sdp { + unsigned char sdp_type; /* Secondary-data Packet Type */ + unsigned char revision; /* Revision Number */ + unsigned char length; /* Number of Valid Data Bytes */ + enum dp_colorspace colorspace; + enum dp_colorimetry colorimetry; + int bpc; /* bit per color */ + enum dp_dynamic_range dynamic_range; + enum dp_content_type content_type; +}; + int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]); static inline int