diff mbox series

drm/i915/lspcon: Make sure link rate did not exceed downstream and lspcon limitation

Message ID 20200205173316.21739-1-shawn.c.lee@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/lspcon: Make sure link rate did not exceed downstream and lspcon limitation | expand

Commit Message

Lee, Shawn C Feb. 5, 2020, 5:33 p.m. UTC
While mode setting, driver would calculate mode rate based on
resolution and bpp. And choose the best bpp that did not exceed
DP bandwidtd.

But LSPCON had more restriction due to it convert DP to HDMI.
Driver should respect HDMI's bandwidth limitation if LSPCON
was active. This change would ignore the bpp when its required
output bandwidth already over HDMI 2.0 or 1.4 spec.

Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: Sam McNally <sammc@google.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 18 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.c | 10 ++++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.h |  1 +
 3 files changed, 29 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 2057f63e32f0..64969ae1c285 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1992,6 +1992,9 @@  intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
 				  const struct link_config_limits *limits)
 {
 	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+	struct intel_connector *connector = intel_dp->attached_connector;
+	const struct drm_display_info *info = &connector->base.display_info;
+	struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
 	int bpp, clock, lane_count;
 	int mode_rate, link_clock, link_avail;
 
@@ -2001,6 +2004,21 @@  intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
 		mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock,
 						   output_bpp);
 
+		/*
+		 * Bypass this mode if require bandwidth over downstream
+		 * limitation or HDMI spec when LSPCON active.
+		 */
+		if (lspcon->active) {
+			int max_clock_rate = lspcon_max_rate(lspcon);
+
+			if (info->max_tmds_clock)
+				max_clock_rate = min(max_clock_rate,
+						     info->max_tmds_clock);
+
+			if (mode_rate > max_clock_rate)
+				continue;
+		}
+
 		for (clock = limits->min_clock; clock <= limits->max_clock; clock++) {
 			for (lane_count = limits->min_lane_count;
 			     lane_count <= limits->max_lane_count;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index d807c5648c87..3b0438356a88 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -518,6 +518,16 @@  void lspcon_set_infoframes(struct intel_encoder *encoder,
 				  buf, ret);
 }
 
+int lspcon_max_rate(struct intel_lspcon *lspcon)
+{
+	enum drm_lspcon_mode current_mode = lspcon_get_current_mode(lspcon);
+
+	if (current_mode == DRM_LSPCON_MODE_LS)
+		return DIV_ROUND_UP(340000 * 24, 8);
+
+	return DIV_ROUND_UP(600000 * 24, 8);
+}
+
 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
 			      const struct intel_crtc_state *pipe_config)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 37cfddf8a9c5..b584c02ab33b 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -18,6 +18,7 @@  struct intel_lspcon;
 bool lspcon_init(struct intel_digital_port *intel_dig_port);
 void lspcon_resume(struct intel_lspcon *lspcon);
 void lspcon_wait_pcon_mode(struct intel_lspcon *lspcon);
+int lspcon_max_rate(struct intel_lspcon *lspcon);
 void lspcon_write_infoframe(struct intel_encoder *encoder,
 			    const struct intel_crtc_state *crtc_state,
 			    unsigned int type,