diff mbox series

[v6,2/3] drm/i915/selftests: add threshold selftests for rc6

Message ID 20200206140402.11790-3-andi@etezian.org (mailing list archive)
State New, archived
Headers show
Series Add basic selftests for rc6 | expand

Commit Message

Andi Shyti Feb. 6, 2020, 2:04 p.m. UTC 
From: Andi Shyti <andi.shyti@intel.com>

rc6 should not work when the evaluation interval is less than the
threshold and should work otherwise.

live_rc6_threshold tests such behavior

The test is added as subtest of the bigger live_late_gt_pm
selftest.

Signed-off-by: Andi Shyti <andi.shyti@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/selftest_gt_pm.c |  1 +
 drivers/gpu/drm/i915/gt/selftest_rc6.c   | 67 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/gt/selftest_rc6.h   |  1 +
 3 files changed, 69 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
index 40562f5208ea..d39a21a047de 100644
--- a/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/selftest_gt_pm.c
@@ -53,6 +53,7 @@  int intel_gt_pm_live_selftests(struct drm_i915_private *i915)
 	static const struct i915_subtest tests[] = {
 		SUBTEST(live_rc6_busy),
 		SUBTEST(live_rc6_manual),
+		SUBTEST(live_rc6_threshold),
 		SUBTEST(live_gt_resume),
 	};
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c b/drivers/gpu/drm/i915/gt/selftest_rc6.c
index 270e8d24036d..7b5d476a8ad1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rc6.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c
@@ -250,6 +250,73 @@  static bool is_rc6_active(struct intel_rc6 *rc6)
 	return !!measure_rc6(uncore, 2 * interval);
 }
 
+int live_rc6_threshold(void *arg)
+{
+	struct intel_gt *gt = arg;
+	struct intel_uncore *uncore = gt->uncore;
+	struct intel_rc6 *rc6 = &gt->rc6;
+	intel_wakeref_t wakeref;
+	u32 threshold, interval;
+	u32 t_orig, i_orig;
+	int err = 0;
+
+	if (!rc6->manual) /* No interfering PCU! */
+		return 0;
+
+	wakeref = intel_runtime_pm_get(uncore->rpm);
+
+	__intel_rc6_disable(rc6); /* stop before adjusting thresholds */
+
+	t_orig = intel_uncore_read(uncore, GEN6_RC6_THRESHOLD);
+	i_orig = intel_uncore_read(uncore, GEN6_RC_EVALUATION_INTERVAL);
+
+	/*
+	 * set the threshold to 50ms
+	 *
+	 * 50ms * 1000 = 50000us
+	 * 50000 / (1.28 * 100) / 100 (we don't have floating point)
+	 */
+	threshold = 50 * 1000 / 128 * 100;
+	intel_uncore_write(uncore, GEN6_RC6_THRESHOLD, threshold);
+
+	/* set interval indicatively to half the threshold */
+	interval = threshold / 2;
+	intel_uncore_write(uncore, GEN6_RC_EVALUATION_INTERVAL, interval);
+
+	intel_rc6_unpark(rc6);
+
+	/* interval < threshold */
+	if (is_rc6_active(rc6)) {
+		pr_err("i915 mismatch: rc6 with interval < threshold\n");
+		err = -EINVAL;
+	}
+
+	__intel_rc6_disable(rc6);
+
+	/* set interval indicatively to twice the threshold */
+	interval = threshold * 2;
+	intel_uncore_write(uncore, GEN6_RC_EVALUATION_INTERVAL, interval);
+
+	intel_rc6_unpark(rc6);
+
+	/* interval > threshold */
+	if (!is_rc6_active(rc6)) {
+		pr_err("i915 mismatch: not in rc6 with interval > threshold\n");
+		err = -EINVAL;
+	}
+
+	__intel_rc6_disable(rc6);
+
+	intel_uncore_write(uncore, GEN6_RC6_THRESHOLD, t_orig);
+	intel_uncore_write(uncore, GEN6_RC_EVALUATION_INTERVAL, i_orig);
+
+	intel_rc6_park(rc6);
+
+	intel_runtime_pm_put(uncore->rpm, wakeref);
+
+	return err;
+}
+
 int live_rc6_busy(void *arg)
 {
 	struct intel_gt *gt = arg;
diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.h b/drivers/gpu/drm/i915/gt/selftest_rc6.h
index 75e05a8a1fda..312894423dc2 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rc6.h
+++ b/drivers/gpu/drm/i915/gt/selftest_rc6.h
@@ -10,5 +10,6 @@ 
 int live_rc6_busy(void *arg);
 int live_rc6_ctx_wa(void *arg);
 int live_rc6_manual(void *arg);
+int live_rc6_threshold(void *arg);
 
 #endif /* SELFTEST_RC6_H */