From patchwork Tue Feb 11 17:25:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Gupta, Anshuman" X-Patchwork-Id: 11376069 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F0E88921 for ; Tue, 11 Feb 2020 17:39:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D9E0F2086A for ; Tue, 11 Feb 2020 17:39:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D9E0F2086A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A57436F3EB; Tue, 11 Feb 2020 17:39:48 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id D33586F3E9 for ; Tue, 11 Feb 2020 17:39:46 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Feb 2020 09:36:47 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,428,1574150400"; d="scan'208";a="380503898" Received: from unknown (HELO genxfsim-desktop.iind.intel.com) ([10.223.74.178]) by orsmga004.jf.intel.com with ESMTP; 11 Feb 2020 09:36:45 -0800 From: Anshuman Gupta To: intel-gfx@lists.freedesktop.org Date: Tue, 11 Feb 2020 22:55:28 +0530 Message-Id: <20200211172532.14287-4-anshuman.gupta@intel.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200211172532.14287-1-anshuman.gupta@intel.com> References: <20200211172532.14287-1-anshuman.gupta@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 3/7] drm/i915: Fix broken transcoder err state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Skip the transcoder whose pipe is disabled while initializing transcoder error state in 3 non-contiguous display pipe system. v2: - Don't skip EDP_TRANSCODER error state. [Ville] - Use a helper has_transcoder(). [Ville] Cc: Ville Syrjälä Signed-off-by: Anshuman Gupta --- drivers/gpu/drm/i915/display/intel_display.c | 2 +- drivers/gpu/drm/i915/display/intel_display_types.h | 14 ++++++++++++++ drivers/gpu/drm/i915/i915_drv.h | 2 ++ 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 5333f7a7db42..a3649020ea97 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -19051,7 +19051,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv) for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) { enum transcoder cpu_transcoder = transcoders[i]; - if (!INTEL_INFO(dev_priv)->trans_offsets[cpu_transcoder]) + if (!has_transcoder(dev_priv, cpu_transcoder)) continue; error->transcoder[i].available = true; diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 14e3d78fef7c..d359f1636ba8 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1626,4 +1626,18 @@ static inline u32 intel_plane_ggtt_offset(const struct intel_plane_state *state) return i915_ggtt_offset(state->vma); } +static inline bool +has_transcoder(struct drm_i915_private *dev_priv, enum transcoder transcoder) { + switch (transcoder) { + case TRANSCODER_EDP: + return HAS_TRANSCODER_EDP(dev_priv); + case TRANSCODER_DSI_0: + return HAS_TRANSCODER_DSI0(dev_priv); + case TRANSCODER_DSI_1: + return HAS_TRANSCODER_DSI1(dev_priv); + default: + return INTEL_INFO(dev_priv)->pipe_mask & BIT(transcoder); + } +} + #endif /* __INTEL_DISPLAY_TYPES_H__ */ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index da509d9b8895..17bbaf7f0844 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1674,6 +1674,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg) #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr) #define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0) +#define HAS_TRANSCODER_DSI0(dev_priv) (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_0] != 0) +#define HAS_TRANSCODER_DSI1(dev_priv) (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_DSI_1] != 0) #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6) #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)