@@ -15737,7 +15737,9 @@ static int intel_atomic_commit(struct drm_device *dev,
{
struct intel_atomic_state *state = to_intel_atomic_state(_state);
struct drm_i915_private *dev_priv = to_i915(dev);
- int ret = 0;
+ struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc *crtc;
+ int ret = 0, i;
state->wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
@@ -15763,10 +15765,6 @@ static int intel_atomic_commit(struct drm_device *dev,
* (assuming we had any) would solve these problems.
*/
if (INTEL_GEN(dev_priv) < 9 && state->base.legacy_cursor_update) {
- struct intel_crtc_state *new_crtc_state;
- struct intel_crtc *crtc;
- int i;
-
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
if (new_crtc_state->wm.need_postvbl_update ||
new_crtc_state->update_wm_post)
@@ -15808,6 +15806,13 @@ static int intel_atomic_commit(struct drm_device *dev,
drm_atomic_state_get(&state->base);
INIT_WORK(&state->base.commit_work, intel_atomic_commit_work);
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+ if (new_crtc_state->uapi.async_flip) {
+ nonblock = false;
+ break;
+ }
+ }
+
i915_sw_fence_commit(&state->commit_ready);
if (nonblock && state->modeset) {
queue_work(dev_priv->modeset_wq, &state->base.commit_work);
Make the commit call blocking in case of async flips so that there is no delay in completing the flip. Signed-off-by: Karthik B S <karthik.b.s@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-)