Message ID | 20200330122354.24752-4-stanislav.lisovskiy@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Consider DBuf bandwidth when calculating CDCLK | expand |
On Mon, Mar 30, 2020 at 03:23:52PM +0300, Stanislav Lisovskiy wrote: > We quite often need now to iterate only particular dbuf slices > in mask, whether they are active or related to particular crtc. > > Let's make our life a bit easier and use a macro for that. > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.h | 7 +++++++ > drivers/gpu/drm/i915/display/intel_display_power.h | 3 +++ > 2 files changed, 10 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > index adb1225a3480..c898285f0dc3 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -187,6 +187,13 @@ enum plane_id { > for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \ > for_each_if((__crtc)->plane_ids_mask & BIT(__p)) > > +#define for_each_dbuf_slice_in_mask(__slice, __mask) \ Please stick to established conventions. > + for ((__slice) = 0; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \ > + for_each_if((1 << (__slice)) & (__mask)) > + > +#define for_each_dbuf_slice(__slice) \ > + for_each_dbuf_slice_in_mask(__slice, (1 << I915_MAX_DBUF_SLICES) - 1) > + > enum port { > PORT_NONE = -1, > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h > index da64a5edae7a..468e8fb0203a 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.h > +++ b/drivers/gpu/drm/i915/display/intel_display_power.h > @@ -311,8 +311,11 @@ intel_display_power_put_async(struct drm_i915_private *i915, > enum dbuf_slice { > DBUF_S1, > DBUF_S2, > + DBUF_SLICE_MAX > }; > > +#define I915_DBUF_MAX_SLICES DBUF_SLICE_MAX > + Huh? > #define with_intel_display_power(i915, domain, wf) \ > for ((wf) = intel_display_power_get((i915), (domain)); (wf); \ > intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0) > -- > 2.24.1.485.gad05a3d8e5
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index adb1225a3480..c898285f0dc3 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -187,6 +187,13 @@ enum plane_id { for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \ for_each_if((__crtc)->plane_ids_mask & BIT(__p)) +#define for_each_dbuf_slice_in_mask(__slice, __mask) \ + for ((__slice) = 0; (__slice) < I915_MAX_DBUF_SLICES; (__slice)++) \ + for_each_if((1 << (__slice)) & (__mask)) + +#define for_each_dbuf_slice(__slice) \ + for_each_dbuf_slice_in_mask(__slice, (1 << I915_MAX_DBUF_SLICES) - 1) + enum port { PORT_NONE = -1, diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h index da64a5edae7a..468e8fb0203a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.h +++ b/drivers/gpu/drm/i915/display/intel_display_power.h @@ -311,8 +311,11 @@ intel_display_power_put_async(struct drm_i915_private *i915, enum dbuf_slice { DBUF_S1, DBUF_S2, + DBUF_SLICE_MAX }; +#define I915_DBUF_MAX_SLICES DBUF_SLICE_MAX + #define with_intel_display_power(i915, domain, wf) \ for ((wf) = intel_display_power_get((i915), (domain)); (wf); \ intel_display_power_put_async((i915), (domain), (wf)), (wf) = 0)
We quite often need now to iterate only particular dbuf slices in mask, whether they are active or related to particular crtc. Let's make our life a bit easier and use a macro for that. Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_display.h | 7 +++++++ drivers/gpu/drm/i915/display/intel_display_power.h | 3 +++ 2 files changed, 10 insertions(+)