| Message ID | 20200407073356.3783-1-stanislav.lisovskiy@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v4,1/5] drm/i915: Decouple cdclk calculation from modeset checks | expand |
On Tue, Apr 07, 2020 at 10:33:56AM +0300, Stanislav Lisovskiy wrote: > We need to calculate cdclk after watermarks/ddb has been calculated > as with recent hw CDCLK needs to be adjusted accordingly to DBuf > requirements, which is not possible with current code organization. > > Setting CDCLK according to DBuf BW requirements and not just rejecting > if it doesn't satisfy BW requirements, will allow us to save power when > it is possible and gain additional bandwidth when it's needed - i.e > boosting both our power management and perfomance capabilities. > > This patch is preparation for that, first we now extract modeset > calculation from modeset checks, in order to call it after wm/ddb > has been calculated. > > v2: - Extract only intel_modeset_calc_cdclk from intel_modeset_checks > (Ville Syrjälä) > > v3: - Clear plls after intel_modeset_calc_cdclk Why did we change this now? > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 22 +++++++++++--------- > 1 file changed, 12 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 70ec301fe6e3..c77088e1d033 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -14464,12 +14464,6 @@ static int intel_modeset_checks(struct intel_atomic_state *state) > return ret; > } > > - ret = intel_modeset_calc_cdclk(state); > - if (ret) > - return ret; > - > - intel_modeset_clear_plls(state); > - > if (IS_HASWELL(dev_priv)) > return hsw_mode_set_planes_workaround(state); > > @@ -14801,10 +14795,6 @@ static int intel_atomic_check(struct drm_device *dev, > goto fail; > } > > - ret = intel_atomic_check_crtcs(state); > - if (ret) > - goto fail; > - > intel_fbc_choose_crtc(dev_priv, state); > ret = calc_watermark_data(state); > if (ret) > @@ -14814,6 +14804,18 @@ static int intel_atomic_check(struct drm_device *dev, > if (ret) > goto fail; > > + if (any_ms) { > + ret = intel_modeset_calc_cdclk(state); > + if (ret) > + return ret; > + > + intel_modeset_clear_plls(state); > + } > + > + ret = intel_atomic_check_crtcs(state); > + if (ret) > + goto fail; > + > for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, > new_crtc_state, i) { > if (!needs_modeset(new_crtc_state) && > -- > 2.24.1.485.gad05a3d8e5
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 70ec301fe6e3..c77088e1d033 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -14464,12 +14464,6 @@ static int intel_modeset_checks(struct intel_atomic_state *state) return ret; } - ret = intel_modeset_calc_cdclk(state); - if (ret) - return ret; - - intel_modeset_clear_plls(state); - if (IS_HASWELL(dev_priv)) return hsw_mode_set_planes_workaround(state); @@ -14801,10 +14795,6 @@ static int intel_atomic_check(struct drm_device *dev, goto fail; } - ret = intel_atomic_check_crtcs(state); - if (ret) - goto fail; - intel_fbc_choose_crtc(dev_priv, state); ret = calc_watermark_data(state); if (ret) @@ -14814,6 +14804,18 @@ static int intel_atomic_check(struct drm_device *dev, if (ret) goto fail; + if (any_ms) { + ret = intel_modeset_calc_cdclk(state); + if (ret) + return ret; + + intel_modeset_clear_plls(state); + } + + ret = intel_atomic_check_crtcs(state); + if (ret) + goto fail; + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { if (!needs_modeset(new_crtc_state) &&
We need to calculate cdclk after watermarks/ddb has been calculated as with recent hw CDCLK needs to be adjusted accordingly to DBuf requirements, which is not possible with current code organization. Setting CDCLK according to DBuf BW requirements and not just rejecting if it doesn't satisfy BW requirements, will allow us to save power when it is possible and gain additional bandwidth when it's needed - i.e boosting both our power management and perfomance capabilities. This patch is preparation for that, first we now extract modeset calculation from modeset checks, in order to call it after wm/ddb has been calculated. v2: - Extract only intel_modeset_calc_cdclk from intel_modeset_checks (Ville Syrjälä) v3: - Clear plls after intel_modeset_calc_cdclk Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 22 +++++++++++--------- 1 file changed, 12 insertions(+), 10 deletions(-)