diff mbox series

[v2,2/2] drm/i915/dp: Wait or poll with timeout for DDI BUF non idle after enable

Message ID 20200618000124.29036-2-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/2] drm/i915/dp: Helper for checking DDI_BUF_CTL Idle status | expand

Commit Message

Navare, Manasi June 18, 2020, 12:01 a.m. UTC
Based on the platform, Bspec expects us to wait or poll with
timeout for DDI BUF IDLE bit to be set to 0 (non idle)
afetr enabling DDI_BUF_CTL. Use the existing wait_for_buf_idle()
to do this.

v2:
* Based on platform, fixed delay or poll (Ville)
* Use a helper to do this (Imre, Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index e4738c3b6d44..788c2be8fa73 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4031,7 +4031,7 @@  static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
 	intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
 	intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
 
-	udelay(600);
+	intel_wait_ddi_buf_idle(dev_priv, port, false);
 }
 
 static void intel_ddi_set_link_train(struct intel_dp *intel_dp,