From patchwork Wed Aug 26 19:06:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11739519 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7583813A4 for ; Wed, 26 Aug 2020 19:05:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5D81D2078A for ; Wed, 26 Aug 2020 19:05:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5D81D2078A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 88B046E996; Wed, 26 Aug 2020 19:05:34 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id E81C06E369 for ; Wed, 26 Aug 2020 19:05:31 +0000 (UTC) IronPort-SDR: grhbTaP6fFkc11P6IOd0UxobCC8F90Qo0ACb/EdcC8L0LpETO5N9+jhslnR27zMubND9C6WjNa bVQVl5khXHxA== X-IronPort-AV: E=McAfee;i="6000,8403,9725"; a="153790975" X-IronPort-AV: E=Sophos;i="5.76,356,1592895600"; d="scan'208";a="153790975" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2020 12:05:31 -0700 IronPort-SDR: OeUXD8xDJkWJG2CzbP3tDTbcvA+N9+VWhoYh65cUjUDrr4F3Zk+awJv9zFXMk6xZMoVG2saUxf brPVn+5+P4Ig== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,356,1592895600"; d="scan'208";a="403157639" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by fmsmga001.fm.intel.com with ESMTP; 26 Aug 2020 12:05:31 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Wed, 26 Aug 2020 12:06:56 -0700 Message-Id: <20200826190657.18283-3-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20200826190657.18283-1-manasi.d.navare@intel.com> References: <20200826190657.18283-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/4] drm/i915/display/dp: Compute VRR state in atomic_check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This forces a complete modeset if vrr drm crtc state goes from enabled to disabled and vice versa. This patch also computes vrr state variables from the mode timings and based on the vrr property set by userspace as well as hardware's vrr capability. Cc: Ville Syrjälä Cc: Jani Nikula Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_display.c | 12 +++++-- drivers/gpu/drm/i915/display/intel_dp.c | 33 ++++++++++++++++++++ 2 files changed, 43 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c8b1dd1a9e46..4caa4cb16b5c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -14033,6 +14033,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config, PIPE_CONF_CHECK_I(mst_master_transcoder); + PIPE_CONF_CHECK_BOOL(vrr.enable); + PIPE_CONF_CHECK_I(vrr.vtotalmin); + PIPE_CONF_CHECK_I(vrr.vtotalmax); + #undef PIPE_CONF_CHECK_X #undef PIPE_CONF_CHECK_I #undef PIPE_CONF_CHECK_BOOL @@ -14899,7 +14903,9 @@ static int intel_atomic_check(struct drm_device *dev, for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { - if (!needs_modeset(new_crtc_state)) { + if (!needs_modeset(new_crtc_state) && + old_crtc_state->uapi.vrr_enabled == + new_crtc_state->uapi.vrr_enabled) { /* Light copy */ intel_crtc_copy_uapi_to_hw_state_nomodeset(new_crtc_state); @@ -14920,7 +14926,9 @@ static int intel_atomic_check(struct drm_device *dev, for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { - if (!needs_modeset(new_crtc_state)) + if (!needs_modeset(new_crtc_state) && + old_crtc_state->uapi.vrr_enabled == + new_crtc_state->uapi.vrr_enabled) continue; ret = intel_modeset_pipe_config_late(new_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3a7129a8ca8a..af2f8fc4f9b1 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2575,6 +2575,38 @@ intel_dp_compute_hdr_metadata_infoframe_sdp(struct intel_dp *intel_dp, intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA); } +static void +intel_dp_vrr_config(struct intel_dp *intel_dp, + struct intel_crtc_state *crtc_state) +{ + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); + struct intel_connector *intel_connector = intel_dp->attached_connector; + struct drm_connector *connector = &intel_connector->base; + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + const struct drm_display_info *info = &connector->display_info; + + if (!intel_dp_is_vrr_capable(connector) || + !crtc_state->uapi.vrr_enabled) + return; + + crtc_state->vrr.enable = true; + crtc_state->vrr.vtotalmin = + min_t(u16, adjusted_mode->crtc_vtotal, + DIV_ROUND_CLOSEST(adjusted_mode->crtc_clock * 1000, + adjusted_mode->crtc_htotal * + info->monitor_range.max_vfreq)); + crtc_state->vrr.vtotalmax = + max_t(u16, adjusted_mode->crtc_vtotal, + DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000, + adjusted_mode->crtc_htotal * + info->monitor_range.min_vfreq)); + + drm_info(&dev_priv->drm, + "VRR Config: Enable = %s Vtotal Min = %d Vtotal Max = %d", + yesno(crtc_state->vrr.enable), crtc_state->vrr.vtotalmin, + crtc_state->vrr.vtotalmax); +} + int intel_dp_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, @@ -2671,6 +2703,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, if (!HAS_DDI(dev_priv)) intel_dp_set_clock(encoder, pipe_config); + intel_dp_vrr_config(intel_dp, pipe_config); intel_psr_compute_config(intel_dp, pipe_config); intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);