| Message ID | 20200909085047.31004-2-vandita.kulkarni@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add support for mipi dsi cmd mode | expand |
On Wed, 09 Sep 2020, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote: > We need details about enabling TE on which port > before we enable TE through vblank enable path. > This is based on the configuration that we receive > from the VBT wrt ports, dual_link. > Reviewed-by: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 30 +++++++++++++++----------- > 1 file changed, 18 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c > index f4053dd6bde9..ee3c5c085cd3 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -1447,6 +1447,18 @@ static bool gen11_dsi_is_periodic_cmd_mode(struct intel_dsi *intel_dsi) > return (val & DSI_PERIODIC_FRAME_UPDATE_ENABLE); > } > > +static void gen11_dsi_get_cmd_mode_config(struct intel_dsi *intel_dsi, > + struct intel_crtc_state *pipe_config) > +{ > + if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A))) > + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1 | > + I915_MODE_FLAG_DSI_USE_TE0; > + else if (intel_dsi->ports == BIT(PORT_B)) > + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1; > + else > + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE0; > +} > + > static void gen11_dsi_get_config(struct intel_encoder *encoder, > struct intel_crtc_state *pipe_config) > { > @@ -1468,6 +1480,10 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, > pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); > pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); > > + /* Get the details on which TE should be enabled */ > + if (is_cmd_mode(intel_dsi)) > + gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config); > + > if (gen11_dsi_is_periodic_cmd_mode(intel_dsi)) > pipe_config->mode_flags |= I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE; > } > @@ -1562,18 +1578,8 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, > * receive TE from the slave if > * dual link is enabled > */ > - if (is_cmd_mode(intel_dsi)) { > - if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A))) > - pipe_config->mode_flags |= > - I915_MODE_FLAG_DSI_USE_TE1 | > - I915_MODE_FLAG_DSI_USE_TE0; > - else if (intel_dsi->ports == BIT(PORT_B)) > - pipe_config->mode_flags |= > - I915_MODE_FLAG_DSI_USE_TE1; > - else > - pipe_config->mode_flags |= > - I915_MODE_FLAG_DSI_USE_TE0; > - } > + if (is_cmd_mode(intel_dsi)) > + gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config); > > return 0; > }
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index f4053dd6bde9..ee3c5c085cd3 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -1447,6 +1447,18 @@ static bool gen11_dsi_is_periodic_cmd_mode(struct intel_dsi *intel_dsi) return (val & DSI_PERIODIC_FRAME_UPDATE_ENABLE); } +static void gen11_dsi_get_cmd_mode_config(struct intel_dsi *intel_dsi, + struct intel_crtc_state *pipe_config) +{ + if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A))) + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1 | + I915_MODE_FLAG_DSI_USE_TE0; + else if (intel_dsi->ports == BIT(PORT_B)) + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE1; + else + pipe_config->mode_flags |= I915_MODE_FLAG_DSI_USE_TE0; +} + static void gen11_dsi_get_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config) { @@ -1468,6 +1480,10 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder, pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI); pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc); + /* Get the details on which TE should be enabled */ + if (is_cmd_mode(intel_dsi)) + gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config); + if (gen11_dsi_is_periodic_cmd_mode(intel_dsi)) pipe_config->mode_flags |= I915_MODE_FLAG_DSI_PERIODIC_CMD_MODE; } @@ -1562,18 +1578,8 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, * receive TE from the slave if * dual link is enabled */ - if (is_cmd_mode(intel_dsi)) { - if (intel_dsi->ports == (BIT(PORT_B) | BIT(PORT_A))) - pipe_config->mode_flags |= - I915_MODE_FLAG_DSI_USE_TE1 | - I915_MODE_FLAG_DSI_USE_TE0; - else if (intel_dsi->ports == BIT(PORT_B)) - pipe_config->mode_flags |= - I915_MODE_FLAG_DSI_USE_TE1; - else - pipe_config->mode_flags |= - I915_MODE_FLAG_DSI_USE_TE0; - } + if (is_cmd_mode(intel_dsi)) + gen11_dsi_get_cmd_mode_config(intel_dsi, pipe_config); return 0; }
We need details about enabling TE on which port before we enable TE through vblank enable path. This is based on the configuration that we receive from the VBT wrt ports, dual_link. Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com> --- drivers/gpu/drm/i915/display/icl_dsi.c | 30 +++++++++++++++----------- 1 file changed, 18 insertions(+), 12 deletions(-)