From patchwork Thu Oct 15 23:49:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 11840323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D42EC433E7 for ; Thu, 15 Oct 2020 23:15:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BAC2020797 for ; Thu, 15 Oct 2020 23:15:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BAC2020797 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 18C316E2B6; Thu, 15 Oct 2020 23:15:25 +0000 (UTC) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id A2EC46E2B6 for ; Thu, 15 Oct 2020 23:15:24 +0000 (UTC) IronPort-SDR: xJe6IXCBfR2Mqs/sKYk7tsoaZuNzycx8sTKo8DLUDj3kpGepJzUqJ/nIg7kugtEEyxIMKiKv4f gKgfxFtNXhDA== X-IronPort-AV: E=McAfee;i="6000,8403,9775"; a="163010327" X-IronPort-AV: E=Sophos;i="5.77,380,1596524400"; d="scan'208";a="163010327" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2020 16:15:24 -0700 IronPort-SDR: QtF+P/OWl44LMNsMpSt8dWaMI9AWEl8qt+ysfitV8DqLij0RnSmUsXnH4xz8bc7qo61S6BiXLV K5BSgVYbF7ow== X-IronPort-AV: E=Sophos;i="5.77,380,1596524400"; d="scan'208";a="531450490" Received: from linux-desktop.iind.intel.com ([10.223.34.173]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Oct 2020 16:15:22 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Fri, 16 Oct 2020 05:19:00 +0530 Message-Id: <20201015234902.7134-11-uma.shankar@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201015234902.7134-1-uma.shankar@intel.com> References: <20201015234902.7134-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v8 10/12] drm/i915/lspcon: Create separate infoframe_enabled helper X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Lspcon has Infoframes as well as DIP for HDR metadata(DRM Infoframe). Create a separate mechanism for lspcon compared to HDMI in order to address the same and ensure future scalability. Suggested-by: Ville Syrjälä Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_ddi.c | 10 +++++++--- drivers/gpu/drm/i915/display/intel_lspcon.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_lspcon.h | 2 ++ 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 35edbd826443..ca99b94b4cbf 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4402,6 +4402,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc); enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); u32 temp, flags = 0; /* XXX: DSI transcoder paranoia */ @@ -4482,9 +4483,12 @@ void intel_ddi_get_config(struct intel_encoder *encoder, pipe_config->fec_enable); } - pipe_config->infoframes.enable |= - intel_hdmi_infoframes_enabled(encoder, pipe_config); - + if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink) + pipe_config->infoframes.enable |= + intel_lspcon_infoframes_enabled(encoder, pipe_config); + else + pipe_config->infoframes.enable |= + intel_hdmi_infoframes_enabled(encoder, pipe_config); break; case TRANS_DDI_MODE_SELECT_DP_MST: pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST); diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index d81a615ff9ac..737bfae6d0ce 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -30,6 +30,7 @@ #include "intel_display_types.h" #include "intel_dp.h" #include "intel_lspcon.h" +#include "intel_hdmi.h" /* LSPCON OUI Vendor ID(signatures) */ #define LSPCON_VENDOR_PARADE_OUI 0x001CF8 @@ -677,6 +678,23 @@ bool lspcon_init(struct intel_digital_port *dig_port) return true; } +u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder, + const struct intel_crtc_state *pipe_config) +{ + struct intel_digital_port *dig_port = enc_to_dig_port(encoder); + u32 val, enabled = 0; + + val = dig_port->infoframes_enabled(encoder, pipe_config); + + if (val & VIDEO_DIP_ENABLE_AVI_HSW) + enabled |= intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI); + + if (val & VIDEO_DIP_ENABLE_GMP_HSW) + enabled |= intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA); + + return enabled; +} + void lspcon_resume(struct intel_digital_port *dig_port) { struct intel_lspcon *lspcon = &dig_port->lspcon; diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h b/drivers/gpu/drm/i915/display/intel_lspcon.h index 15965c77b43a..d69056f12a8b 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.h +++ b/drivers/gpu/drm/i915/display/intel_lspcon.h @@ -43,5 +43,7 @@ void hsw_read_infoframe(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, unsigned int type, void *frame, ssize_t len); +u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder, + const struct intel_crtc_state *pipe_config); #endif /* __INTEL_LSPCON_H__ */