| Message ID | 20201020053657.99890-1-tejaskumarx.surendrakumar.upadhyay@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [V2] drm/i915/edp/jsl: Update vswing table for HBR and HBR2 | expand |
On Tue, 2020-10-20 at 11:06 +0530, Tejas Upadhyay wrote: > JSL has update in vswing table for eDP. > > BSpec: 21257 > > Changes since V1: > - Fixed few checkpatch errors > Reviewed-by: José Roberto de Souza <jose.souza@intel.com> > Cc: Souza Jose <jose.souza@intel.com> > Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 87 +++++++++++++++++++++++- > 1 file changed, 85 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index bb0b9930958f..8fd81a3932a4 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -582,6 +582,34 @@ static const struct cnl_ddi_buf_trans ehl_combo_phy_ddi_translations_dp[] = { > { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ > }; > > > > > +static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr[] = { > + /* NT mV Trans mV db */ > + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ > + { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 200 250 1.9 */ > + { 0x1, 0x7F, 0x33, 0x00, 0x0C }, /* 200 300 3.5 */ > + { 0xA, 0x35, 0x36, 0x00, 0x09 }, /* 200 350 4.9 */ > + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ > + { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 250 300 1.6 */ > + { 0xA, 0x35, 0x35, 0x00, 0x0A }, /* 250 350 2.9 */ > + { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ > + { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ > + { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > +}; > + > +static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr2[] = { > + /* NT mV Trans mV db */ > + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ > + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 250 1.9 */ > + { 0x1, 0x7F, 0x3D, 0x00, 0x02 }, /* 200 300 3.5 */ > + { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 200 350 4.9 */ > + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ > + { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 300 1.6 */ > + { 0xA, 0x35, 0x3A, 0x00, 0x05 }, /* 250 350 2.9 */ > + { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ > + { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ > + { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ > +}; > + > struct icl_mg_phy_ddi_buf_trans { > u32 cri_txdeemph_override_11_6; > u32 cri_txdeemph_override_5_0; > @@ -1162,6 +1190,57 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, > return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > } > > > > > +static const struct cnl_ddi_buf_trans * > +jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_hdmi); > + return icl_combo_phy_ddi_translations_hdmi; > +} > + > +static const struct cnl_ddi_buf_trans * > +jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_dp_hbr2); > + return icl_combo_phy_ddi_translations_dp_hbr2; > +} > + > +static const struct cnl_ddi_buf_trans * > +jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > + > + if (dev_priv->vbt.edp.low_vswing) { > + if (crtc_state->port_clock > 270000) { > + *n_entries = ARRAY_SIZE(jsl_combo_phy_ddi_translations_edp_hbr2); > + return jsl_combo_phy_ddi_translations_edp_hbr2; > + } else { > + *n_entries = ARRAY_SIZE(jsl_combo_phy_ddi_translations_edp_hbr); > + return jsl_combo_phy_ddi_translations_edp_hbr; > + } > + } > + > + return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > +} > + > +static const struct cnl_ddi_buf_trans * > +jsl_get_combo_buf_trans(struct intel_encoder *encoder, > + const struct intel_crtc_state *crtc_state, > + int *n_entries) > +{ > + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) > + return jsl_get_combo_buf_trans_hdmi(encoder, crtc_state, n_entries); > + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) > + return jsl_get_combo_buf_trans_edp(encoder, crtc_state, n_entries); > + else > + return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); > +} > + > static const struct cnl_ddi_buf_trans * > tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > @@ -2363,7 +2442,9 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp, > else > tgl_get_dkl_buf_trans(encoder, crtc_state, &n_entries); > } else if (INTEL_GEN(dev_priv) == 11) { > - if (IS_JSL_EHL(dev_priv)) > + if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE)) > + jsl_get_combo_buf_trans(encoder, crtc_state, &n_entries); > + else if (IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)) > ehl_get_combo_buf_trans(encoder, crtc_state, &n_entries); > else if (intel_phy_is_combo(dev_priv, phy)) > icl_get_combo_buf_trans(encoder, crtc_state, &n_entries); > @@ -2544,7 +2625,9 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, > > > > > if (INTEL_GEN(dev_priv) >= 12) > ddi_translations = tgl_get_combo_buf_trans(encoder, crtc_state, &n_entries); > - else if (IS_JSL_EHL(dev_priv)) > + else if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE)) > + ddi_translations = jsl_get_combo_buf_trans(encoder, crtc_state, &n_entries); > + else if (IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)) > ddi_translations = ehl_get_combo_buf_trans(encoder, crtc_state, &n_entries); > else > ddi_translations = icl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
On Tue, 2020-10-20 at 07:40 +0000, Patchwork wrote: > Patch Details > Series: drm/i915/edp/jsl: Update vswing table for HBR and HBR2 (rev3) URL: https://patchwork.freedesktop.org/series/82206/ State: success Details: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18738/index.html > CI Bug Log - changes from CI_DRM_9166_full -> Patchwork_18738_fullSummarySUCCESS > No regressions found. Thanks for the patch, pushed to dinq. > Known issuesHere are the changes found in Patchwork_18738_full that come from known issues: > IGT changesIssues hit * igt@gem_exec_reloc@basic-many-active@rcs0:shard-snb: PASS -> FAIL (i915#2389) > * igt@gem_exec_whisper@basic-forked-all:shard-glk: PASS -> DMESG-WARN (i915#118 / i915#95) > * igt@gem_userptr_blits@unsync-unmap-cycles:shard-skl: PASS -> TIMEOUT (i915#2424) +1 similar issue > * igt@i915_pm_dc@dc6-psr:shard-skl: PASS -> FAIL (i915#454) > * igt@kms_draw_crc@draw-method-xrgb8888-render-xtiled:shard-snb: PASS -> FAIL (i915#54) > * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:shard-skl: PASS -> INCOMPLETE (i915#198) > * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:shard-skl: PASS -> FAIL (fdo#108145 / i915#265) > * igt@kms_plane_scaling@pipe-c-plane-scaling:shard-skl: PASS -> DMESG-WARN (i915#1982) +6 similar issues > * igt@kms_psr@psr2_cursor_render:shard-iclb: PASS -> SKIP (fdo#109441) +3 similar issues > * igt@kms_universal_plane@universal-plane-gen9-features-pipe-a:shard-kbl: PASS -> DMESG-WARN (i915#1982) > * igt@kms_vblank@crtc-id:shard-tglb: PASS -> DMESG-WARN (i915#1982) > Possible fixes * igt@api_intel_bb@blit-noreloc-purge-cache:shard-snb: FAIL -> PASS > * igt@gem_exec_parallel@fds@vecs0:shard-iclb: DMESG-WARN (i915#1982) -> PASS > * igt@gem_exec_reloc@basic-many-active@vecs0:shard-glk: FAIL (i915#2389) -> PASS +2 similar issues > * igt@gem_exec_whisper@basic-contexts:shard-glk: DMESG-WARN (i915#118 / i915#95) -> PASS +2 similar issues > * igt@i915_pm_backlight@fade_with_suspend:shard-skl: INCOMPLETE -> PASS > * igt@i915_suspend@debugfs-reader:shard-kbl: INCOMPLETE (i915#155) -> PASS > * {igt@kms_async_flips@async-flip-with-page-flip-events}:shard-kbl: FAIL (i915#2521) -> PASS +1 similar issueshard-apl: FAIL (i915#1635 / > i915#2521) -> PASS > * igt@kms_big_fb@linear-32bpp-rotate-180:shard-glk: DMESG-FAIL (i915#118 / i915#95) -> PASS > * igt@kms_big_fb@y-tiled-8bpp-rotate-180:shard-kbl: DMESG-WARN (i915#1982) -> PASS +1 similar issueshard-apl: DMESG-WARN (i915#1635 / i915#1982) -> > PASS > * igt@kms_ccs@pipe-a-crc-primary-rotation-180:shard-skl: FAIL -> PASS > * igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen:shard-skl: FAIL (i915#54) -> PASS > * igt@kms_cursor_legacy@cursor-vs-flip-varying-size:shard-hsw: FAIL (i915#2370) -> PASS > * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-xtiled:shard-skl: DMESG-WARN (i915#1982) -> PASS +6 similar issues > * igt@kms_draw_crc@draw-method-xrgb2101010-blt-untiled:shard-snb: FAIL (i915#54) -> PASS > * igt@kms_flip@2x-flip-vs-absolute-wf_vblank@ab-vga1-hdmi-a1:shard-hsw: DMESG-WARN (i915#1982) -> PASS > * igt@kms_flip@plain-flip-fb-recreate@b-edp1:shard-skl: FAIL (i915#2122) -> PASS > * igt@kms_frontbuffer_tracking@fbc-modesetfrombusy:shard-snb: FAIL (i915#2546) -> PASS > * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-blt:shard-tglb: DMESG-WARN (i915#1982) -> PASS +1 similar issue > * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:shard-skl: FAIL (fdo#108145 / i915#265) -> PASS +1 similar issue > * igt@kms_psr@psr2_cursor_blt:shard-iclb: SKIP (fdo#109441) -> PASS +1 similar issue > * igt@kms_vblank@pipe-c-ts-continuation-suspend:shard-skl: INCOMPLETE (i915#198) -> PASS > * igt@perf@polling-parameterized:shard-skl: FAIL (i915#1542) -> PASS > Warnings * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:shard-skl: DMESG-WARN (i915#1982) -> FAIL (fdo#108145 / i915#265) > * igt@kms_setmode@basic:shard-skl: FAIL (i915#31) -> DMESG-FAIL (i915#1982 / i915#31) > * igt@prime_vgem@coherency-blt:shard-snb: FAIL -> INCOMPLETE (i915#82) > {name}: This element is suppressed. This means it is ignored when computing > the status of the difference (SUCCESS, WARNING, or FAILURE). > Participating hosts (11 -> 11)No changes in participating hosts > Build changes * Linux: CI_DRM_9166 -> Patchwork_18738 > CI-20190529: 20190529 > CI_DRM_9166: f10a69af784776f63cf892611a6baa33e8c35fca @ git://anongit.freedesktop.org/gfx-ci/linux > IGT_5822: b4bcf05cb9839037128905deda7146434155cc41 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools > Patchwork_18738: 4edc2bd181ae441b0057ee5108b0e76883c42310 @ git://anongit.freedesktop.org/gfx-ci/linux > piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index bb0b9930958f..8fd81a3932a4 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -582,6 +582,34 @@ static const struct cnl_ddi_buf_trans ehl_combo_phy_ddi_translations_dp[] = { { 0x6, 0x7F, 0x3F, 0x00, 0x00 }, /* 900 900 0.0 */ }; +static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr[] = { + /* NT mV Trans mV db */ + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ + { 0x8, 0x7F, 0x38, 0x00, 0x07 }, /* 200 250 1.9 */ + { 0x1, 0x7F, 0x33, 0x00, 0x0C }, /* 200 300 3.5 */ + { 0xA, 0x35, 0x36, 0x00, 0x09 }, /* 200 350 4.9 */ + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ + { 0x1, 0x7F, 0x38, 0x00, 0x07 }, /* 250 300 1.6 */ + { 0xA, 0x35, 0x35, 0x00, 0x0A }, /* 250 350 2.9 */ + { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ + { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ + { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ +}; + +static const struct cnl_ddi_buf_trans jsl_combo_phy_ddi_translations_edp_hbr2[] = { + /* NT mV Trans mV db */ + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 200 0.0 */ + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 200 250 1.9 */ + { 0x1, 0x7F, 0x3D, 0x00, 0x02 }, /* 200 300 3.5 */ + { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 200 350 4.9 */ + { 0x8, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 250 0.0 */ + { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 250 300 1.6 */ + { 0xA, 0x35, 0x3A, 0x00, 0x05 }, /* 250 350 2.9 */ + { 0x1, 0x7F, 0x3F, 0x00, 0x00 }, /* 300 300 0.0 */ + { 0xA, 0x35, 0x38, 0x00, 0x07 }, /* 300 350 1.3 */ + { 0xA, 0x35, 0x3F, 0x00, 0x00 }, /* 350 350 0.0 */ +}; + struct icl_mg_phy_ddi_buf_trans { u32 cri_txdeemph_override_11_6; u32 cri_txdeemph_override_5_0; @@ -1162,6 +1190,57 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder, return ehl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); } +static const struct cnl_ddi_buf_trans * +jsl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_hdmi); + return icl_combo_phy_ddi_translations_hdmi; +} + +static const struct cnl_ddi_buf_trans * +jsl_get_combo_buf_trans_dp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_dp_hbr2); + return icl_combo_phy_ddi_translations_dp_hbr2; +} + +static const struct cnl_ddi_buf_trans * +jsl_get_combo_buf_trans_edp(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); + + if (dev_priv->vbt.edp.low_vswing) { + if (crtc_state->port_clock > 270000) { + *n_entries = ARRAY_SIZE(jsl_combo_phy_ddi_translations_edp_hbr2); + return jsl_combo_phy_ddi_translations_edp_hbr2; + } else { + *n_entries = ARRAY_SIZE(jsl_combo_phy_ddi_translations_edp_hbr); + return jsl_combo_phy_ddi_translations_edp_hbr; + } + } + + return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); +} + +static const struct cnl_ddi_buf_trans * +jsl_get_combo_buf_trans(struct intel_encoder *encoder, + const struct intel_crtc_state *crtc_state, + int *n_entries) +{ + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) + return jsl_get_combo_buf_trans_hdmi(encoder, crtc_state, n_entries); + else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) + return jsl_get_combo_buf_trans_edp(encoder, crtc_state, n_entries); + else + return jsl_get_combo_buf_trans_dp(encoder, crtc_state, n_entries); +} + static const struct cnl_ddi_buf_trans * tgl_get_combo_buf_trans_hdmi(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state, @@ -2363,7 +2442,9 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp, else tgl_get_dkl_buf_trans(encoder, crtc_state, &n_entries); } else if (INTEL_GEN(dev_priv) == 11) { - if (IS_JSL_EHL(dev_priv)) + if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE)) + jsl_get_combo_buf_trans(encoder, crtc_state, &n_entries); + else if (IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)) ehl_get_combo_buf_trans(encoder, crtc_state, &n_entries); else if (intel_phy_is_combo(dev_priv, phy)) icl_get_combo_buf_trans(encoder, crtc_state, &n_entries); @@ -2544,7 +2625,9 @@ static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder, if (INTEL_GEN(dev_priv) >= 12) ddi_translations = tgl_get_combo_buf_trans(encoder, crtc_state, &n_entries); - else if (IS_JSL_EHL(dev_priv)) + else if (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE)) + ddi_translations = jsl_get_combo_buf_trans(encoder, crtc_state, &n_entries); + else if (IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)) ddi_translations = ehl_get_combo_buf_trans(encoder, crtc_state, &n_entries); else ddi_translations = icl_get_combo_buf_trans(encoder, crtc_state, &n_entries);
JSL has update in vswing table for eDP. BSpec: 21257 Changes since V1: - Fixed few checkpatch errors Cc: Souza Jose <jose.souza@intel.com> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 87 +++++++++++++++++++++++- 1 file changed, 85 insertions(+), 2 deletions(-)