From patchwork Thu Oct 22 05:42:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11850313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 977F9C5517A for ; Thu, 22 Oct 2020 05:40:58 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 38F6F223FB for ; Thu, 22 Oct 2020 05:40:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 38F6F223FB Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E1AC56F3A6; Thu, 22 Oct 2020 05:40:56 +0000 (UTC) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7E37C6F3A6 for ; Thu, 22 Oct 2020 05:40:53 +0000 (UTC) IronPort-SDR: DlEIATQj9XHJDPnF16kte7mehj8gylLv93ciWJOLnWWzPow/lYrYlGZcyrf8/qSmYtqraZr6hr vG0sa8AVHizw== X-IronPort-AV: E=McAfee;i="6000,8403,9781"; a="146768360" X-IronPort-AV: E=Sophos;i="5.77,403,1596524400"; d="scan'208";a="146768360" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2020 22:40:53 -0700 IronPort-SDR: C8FGnUmJFL/JpAVDNAI9td/m+6v0fMLUlhxZU49/zUOe2u38Iy9JrlPJDZZrYYm1zWeusxzx0s WpqoB50wS7DQ== X-IronPort-AV: E=Sophos;i="5.77,403,1596524400"; d="scan'208";a="523012877" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 21 Oct 2020 22:40:52 -0700 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Wed, 21 Oct 2020 22:42:12 -0700 Message-Id: <20201022054223.25071-2-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201022054223.25071-1-manasi.d.navare@intel.com> References: <20201022054223.25071-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v11 01/12] HAX to make DSC work on the icelake test system X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Maarten Lankhorst DSC is available on the display emulator, but not set in DPCD. Override the entries to allow bigjoiner testing. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/drm_dp_helper.c | 4 ++-- include/drm/drm_dp_helper.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 14ddf28ecac0..945c752eac2b 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -2065,7 +2065,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK) return 4; if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK) - return 2; + return 4; if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK) return 1; } else { @@ -2089,7 +2089,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE], if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK) return 4; if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK) - return 2; + return 4; if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK) return 1; } diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index f55a9d1320ca..ff30cc240e19 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -1549,6 +1549,7 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpc[DP_DSC_RECEIVER_CAP_SI static inline bool drm_dp_sink_supports_dsc(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]) { + return dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT]; return dsc_dpcd[DP_DSC_SUPPORT - DP_DSC_SUPPORT] & DP_DSC_DECOMPRESSION_IS_SUPPORTED; }