| Message ID | 20201028144312.12520-1-shawn.c.lee@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/rkl: new rkl ddc map for different PCH | expand |
On Wed, 28 Oct 2020, Lee Shawn C <shawn.c.lee@intel.com> wrote: > After boot into kernel. Driver configured ddc pin mapping based on > predefined table in parse_ddi_port(). Now driver configure rkl > ddc pin mapping depends on icp_ddc_pin_map[]. Then this table will > give incorrect gmbus port number to cause HDMI can't work. > > Refer to commit d0a89527d06 ("drm/i915/rkl: Add DDC pin mapping"). > Create two ddc pin table for rkl TGP and CMP pch. Then HDMI can > works properly on rkl. > > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Aditya Swarup <aditya.swarup@intel.com> > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> > Cc: Jani Nikula <jani.nikula@linux.intel.com> > Cc: Cooper Chiou <cooper.chiou@intel.com> > Cc: Khaled Almahallawy <khaled.almahallawy@intel.com> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2577 > Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> > --- > drivers/gpu/drm/i915/display/intel_bios.c | 22 ++++++++++++++++++- > drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 ++++ > 2 files changed, 25 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c > index a0a41ec5c341..f2c4772e4c7f 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -1597,12 +1597,32 @@ static const u8 icp_ddc_pin_map[] = { > [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, > }; > > +static const u8 rkl_pch_tgp_ddc_pin_map[] = { > + [RKL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, > + [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP, > + [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, > +}; > + > +static const u8 rkl_pch_cmp_ddc_pin_map[] = { > + [RKL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, > + [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_3_BXT, > + [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_4_CNP, > +}; > + > static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) > { > const u8 *ddc_pin_map; > int n_entries; > > - if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { > + if (IS_ROCKETLAKE(dev_priv)) { Why the platform check for a PCH based thing? BR, Jani. > + if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP) { > + ddc_pin_map = rkl_pch_tgp_ddc_pin_map; > + n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); > + } else { > + ddc_pin_map = rkl_pch_cmp_ddc_pin_map; > + n_entries = ARRAY_SIZE(rkl_pch_cmp_ddc_pin_map); > + } > + } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { > ddc_pin_map = icp_ddc_pin_map; > n_entries = ARRAY_SIZE(icp_ddc_pin_map); > } else if (HAS_PCH_CNP(dev_priv)) { > diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > index 6faabd4f6d49..3418c00446c1 100644 > --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h > +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h > @@ -315,6 +315,10 @@ enum vbt_gmbus_ddi { > ICL_DDC_BUS_DDI_A = 0x1, > ICL_DDC_BUS_DDI_B, > TGL_DDC_BUS_DDI_C, > + RKL_DDC_BUS_DDI_B = 0x1, > + RKL_DDC_BUS_DDI_C, > + RKL_DDC_BUS_DDI_D, > + RKL_DDC_BUS_DDI_E, > ICL_DDC_BUS_PORT_1 = 0x4, > ICL_DDC_BUS_PORT_2, > ICL_DDC_BUS_PORT_3,
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c index a0a41ec5c341..f2c4772e4c7f 100644 --- a/drivers/gpu/drm/i915/display/intel_bios.c +++ b/drivers/gpu/drm/i915/display/intel_bios.c @@ -1597,12 +1597,32 @@ static const u8 icp_ddc_pin_map[] = { [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP, }; +static const u8 rkl_pch_tgp_ddc_pin_map[] = { + [RKL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, + [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP, + [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP, +}; + +static const u8 rkl_pch_cmp_ddc_pin_map[] = { + [RKL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT, + [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_3_BXT, + [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_4_CNP, +}; + static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin) { const u8 *ddc_pin_map; int n_entries; - if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { + if (IS_ROCKETLAKE(dev_priv)) { + if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP) { + ddc_pin_map = rkl_pch_tgp_ddc_pin_map; + n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map); + } else { + ddc_pin_map = rkl_pch_cmp_ddc_pin_map; + n_entries = ARRAY_SIZE(rkl_pch_cmp_ddc_pin_map); + } + } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) { ddc_pin_map = icp_ddc_pin_map; n_entries = ARRAY_SIZE(icp_ddc_pin_map); } else if (HAS_PCH_CNP(dev_priv)) { diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h index 6faabd4f6d49..3418c00446c1 100644 --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h @@ -315,6 +315,10 @@ enum vbt_gmbus_ddi { ICL_DDC_BUS_DDI_A = 0x1, ICL_DDC_BUS_DDI_B, TGL_DDC_BUS_DDI_C, + RKL_DDC_BUS_DDI_B = 0x1, + RKL_DDC_BUS_DDI_C, + RKL_DDC_BUS_DDI_D, + RKL_DDC_BUS_DDI_E, ICL_DDC_BUS_PORT_1 = 0x4, ICL_DDC_BUS_PORT_2, ICL_DDC_BUS_PORT_3,
After boot into kernel. Driver configured ddc pin mapping based on predefined table in parse_ddi_port(). Now driver configure rkl ddc pin mapping depends on icp_ddc_pin_map[]. Then this table will give incorrect gmbus port number to cause HDMI can't work. Refer to commit d0a89527d06 ("drm/i915/rkl: Add DDC pin mapping"). Create two ddc pin table for rkl TGP and CMP pch. Then HDMI can works properly on rkl. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Aditya Swarup <aditya.swarup@intel.com> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Cc: Khaled Almahallawy <khaled.almahallawy@intel.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2577 Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com> --- drivers/gpu/drm/i915/display/intel_bios.c | 22 ++++++++++++++++++- drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 ++++ 2 files changed, 25 insertions(+), 1 deletion(-)