Message ID | 20201117185029.22078-14-aditya.swarup@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Introduce Alderlake-S | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of > Aditya Swarup > Sent: Tuesday, November 17, 2020 10:50 AM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com>; De Marchi, Lucas > <lucas.demarchi@intel.com> > Subject: [Intel-gfx] [PATCH 13/21] drm/i915/adl_s: Update combo PHY > master/slave relationships > > From: Matt Roper <matthew.d.roper@intel.com> > > ADL-S switches up which PHYs are considered a master to other PHYs; PHY-C > is no longer a master, but PHY-D is now. > > Bspec: 49291 > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Cc: Imre Deak <imre.deak@intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: Aditya Swarup <aditya.swarup@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/display/intel_combo_phy.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c > b/drivers/gpu/drm/i915/display/intel_combo_phy.c > index d5ad61e4083e..55d2d2d9efbb 100644 > --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c > @@ -246,14 +246,21 @@ static bool phy_is_master(struct > drm_i915_private *dev_priv, enum phy phy) > * RKL,DG1: > * A(master) -> B(slave) > * C(master) -> D(slave) > + * ADL-S: > + * A(master) -> B(slave), C(slave) > + * D(master) -> E(slave) > * > * We must set the IREFGEN bit for any PHY acting as a master > * to another PHY. > */ > - if ((IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) && phy == > PHY_C) > + if (phy == PHY_A) > return true; > + else if (IS_ALDERLAKE_S(dev_priv)) > + return phy == PHY_D; > + else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) > + return phy == PHY_C; > > - return phy == PHY_A; > + return false; > } > > static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, > -- > 2.27.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/display/intel_combo_phy.c b/drivers/gpu/drm/i915/display/intel_combo_phy.c index d5ad61e4083e..55d2d2d9efbb 100644 --- a/drivers/gpu/drm/i915/display/intel_combo_phy.c +++ b/drivers/gpu/drm/i915/display/intel_combo_phy.c @@ -246,14 +246,21 @@ static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy) * RKL,DG1: * A(master) -> B(slave) * C(master) -> D(slave) + * ADL-S: + * A(master) -> B(slave), C(slave) + * D(master) -> E(slave) * * We must set the IREFGEN bit for any PHY acting as a master * to another PHY. */ - if ((IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) && phy == PHY_C) + if (phy == PHY_A) return true; + else if (IS_ALDERLAKE_S(dev_priv)) + return phy == PHY_D; + else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) + return phy == PHY_C; - return phy == PHY_A; + return false; } static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,