diff mbox series

[21/21] drm/i915/adl_s: Update memory bandwidth parameters

Message ID 20201117185029.22078-22-aditya.swarup@intel.com (mailing list archive)
State New, archived
Headers show
Series Introduce Alderlake-S | expand

Commit Message

Aditya Swarup Nov. 17, 2020, 6:50 p.m. UTC 
From: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>

Just like RKL, the ADL_S platform also has different memory
characteristics from past platforms.  Update the values used
by our memory bandwidth calculations accordingly.

Bspec: 64631
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Srivatsa, Anusha Nov. 25, 2020, 10:46 p.m. UTC | #1 
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Aditya Swarup
> Sent: Tuesday, November 17, 2020 10:50 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; De Marchi, Lucas
> <lucas.demarchi@intel.com>
> Subject: [Intel-gfx] [PATCH 21/21] drm/i915/adl_s: Update memory
> bandwidth parameters
> 
> From: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com>
> 
> Just like RKL, the ADL_S platform also has different memory characteristics
> from past platforms.  Update the values used by our memory bandwidth
> calculations accordingly.
> 
> Bspec: 64631
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Tejas Upadhyay
> <tejaskumarx.surendrakumar.upadhyay@intel.com>
> Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index bd060404d249..32522ec1ffb9 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -205,6 +205,12 @@ static const struct intel_sa_info rkl_sa_info = {
>  	.displayrtids = 128,
>  };
> 
> +static const struct intel_sa_info adls_sa_info = {
> +	.deburst = 16,
> +	.deprogbwlimit = 38, /* GB/s */
> +	.displayrtids = 256,
> +};
> +
>  static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct
> intel_sa_info *sa)  {
>  	struct intel_qgv_info qi = {};
> @@ -317,6 +323,8 @@ void intel_bw_init_hw(struct drm_i915_private
> *dev_priv)
> 
>  	if (IS_ROCKETLAKE(dev_priv))
>  		icl_get_bw_info(dev_priv, &rkl_sa_info);
> +	else if (IS_ALDERLAKE_S(dev_priv))
> +		icl_get_bw_info(dev_priv, &adls_sa_info);
>  	else if (IS_GEN(dev_priv, 12))
>  		icl_get_bw_info(dev_priv, &tgl_sa_info);
>  	else if (IS_GEN(dev_priv, 11))
> --
> 2.27.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index bd060404d249..32522ec1ffb9 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -205,6 +205,12 @@  static const struct intel_sa_info rkl_sa_info = {
 	.displayrtids = 128,
 };
 
+static const struct intel_sa_info adls_sa_info = {
+	.deburst = 16,
+	.deprogbwlimit = 38, /* GB/s */
+	.displayrtids = 256,
+};
+
 static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa)
 {
 	struct intel_qgv_info qi = {};
@@ -317,6 +323,8 @@  void intel_bw_init_hw(struct drm_i915_private *dev_priv)
 
 	if (IS_ROCKETLAKE(dev_priv))
 		icl_get_bw_info(dev_priv, &rkl_sa_info);
+	else if (IS_ALDERLAKE_S(dev_priv))
+		icl_get_bw_info(dev_priv, &adls_sa_info);
 	else if (IS_GEN(dev_priv, 12))
 		icl_get_bw_info(dev_priv, &tgl_sa_info);
 	else if (IS_GEN(dev_priv, 11))