diff mbox series

[v3,5/5] HAX/DO_NOT_MERGE_IT: drm/i915/display: Enable PSR2 selective fetch for testing

Message ID 20201127105041.2793779-5-gwan-gyeong.mun@intel.com (mailing list archive)
State New, archived
Headers show
Series [v3,1/5] drm/i915/display/psr: Calculate selective fetch plane registers | expand

Commit Message

Gwan-gyeong Mun Nov. 27, 2020, 10:50 a.m. UTC 
From: José Roberto de Souza <jose.souza@intel.com>

Enabling it to check if it causes regressions in CI but the feature is
still not ready to be enabled by default.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_params.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 330c03e2b4f7..b8b19270c339 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -54,7 +54,7 @@  struct drm_printer;
 	param(int, enable_fbc, -1, 0600) \
 	param(int, enable_psr, -1, 0600) \
 	param(bool, psr_safest_params, false, 0600) \
-	param(bool, enable_psr2_sel_fetch, false, 0600) \
+	param(bool, enable_psr2_sel_fetch, true, 0600) \
 	param(int, disable_power_well, -1, 0400) \
 	param(int, enable_ips, 1, 0600) \
 	param(int, invert_brightness, 0, 0600) \