From patchwork Mon Nov 30 20:47:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 11941279 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8EBCDC64E8A for ; Mon, 30 Nov 2020 20:14:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 452242073C for ; Mon, 30 Nov 2020 20:14:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 452242073C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 17E056E83F; Mon, 30 Nov 2020 20:14:29 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 02A516E837 for ; Mon, 30 Nov 2020 20:14:27 +0000 (UTC) IronPort-SDR: y6XEwWZoPRDvN+lv5IhGbit4WJF+dXtSp5iaXIVXhuAPKxsVZyka3RvcF5Io0QMt4G/1tJxfH5 1VxkR4WBlGjA== X-IronPort-AV: E=McAfee;i="6000,8403,9821"; a="190892968" X-IronPort-AV: E=Sophos;i="5.78,382,1599548400"; d="scan'208";a="190892968" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2020 12:14:19 -0800 IronPort-SDR: r3P/V+Aofh+6FMCaE6A32JVApvUi1BIfLIE29JJiyUhJJAz3Vh7d0m5PruKYPg35RcJ571B+MG Yr431VjGxI0A== X-IronPort-AV: E=Sophos;i="5.78,382,1599548400"; d="scan'208";a="372472350" Received: from linux-desktop.iind.intel.com ([10.223.34.173]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2020 12:14:18 -0800 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Tue, 1 Dec 2020 02:17:33 +0530 Message-Id: <20201130204738.2443-11-uma.shankar@intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201130204738.2443-1-uma.shankar@intel.com> References: <20201130204738.2443-1-uma.shankar@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [v14 10/15] drm/i915/display: Enable HDR for Parade based lspcon X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vipin Anand Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Enable HDR for LSPCON based on Parade along with MCA. v2: Added a helper for status reg as suggested by Ville. v3: Removed a redundant variable, added Ville's RB. Signed-off-by: Uma Shankar Signed-off-by: Vipin Anand Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_lspcon.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c index cb768a1ae4c9..592c19deba00 100644 --- a/drivers/gpu/drm/i915/display/intel_lspcon.c +++ b/drivers/gpu/drm/i915/display/intel_lspcon.c @@ -36,6 +36,7 @@ #define LSPCON_VENDOR_MCA_OUI 0x0060AD #define DPCD_MCA_LSPCON_HDR_STATUS 0x70003 +#define DPCD_PARADE_LSPCON_HDR_STATUS 0x00511 /* AUX addresses to write MCA AVI IF */ #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0 @@ -106,6 +107,14 @@ static bool lspcon_detect_vendor(struct intel_lspcon *lspcon) return true; } +static u32 get_hdr_status_reg(struct intel_lspcon *lspcon) +{ + if (lspcon->vendor == LSPCON_VENDOR_MCA) + return DPCD_MCA_LSPCON_HDR_STATUS; + else + return DPCD_PARADE_LSPCON_HDR_STATUS; +} + void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon) { struct intel_digital_port *dig_port = @@ -115,12 +124,8 @@ void lspcon_detect_hdr_capability(struct intel_lspcon *lspcon) u8 hdr_caps; int ret; - /* Enable HDR for MCA based LSPCON devices */ - if (lspcon->vendor == LSPCON_VENDOR_MCA) - ret = drm_dp_dpcd_read(&dp->aux, DPCD_MCA_LSPCON_HDR_STATUS, - &hdr_caps, 1); - else - return; + ret = drm_dp_dpcd_read(&dp->aux, get_hdr_status_reg(lspcon), + &hdr_caps, 1); if (ret < 0) { drm_dbg_kms(dev, "HDR capability detection failed\n");