From patchwork Thu Dec 3 23:53:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 11949931 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 214C9C4361A for ; Thu, 3 Dec 2020 23:51:14 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C118522285 for ; Thu, 3 Dec 2020 23:51:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C118522285 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BA0E46E0E4; Thu, 3 Dec 2020 23:51:07 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id F2C9A6E0DF for ; Thu, 3 Dec 2020 23:51:04 +0000 (UTC) IronPort-SDR: bcNq+EQ6lPfUT5t0f1EWl+s5dl58betssgKlmHgBNvF/ILxLTS2VZ+309Puyy7KKD8WWd9r1hW YinZdkGQvUcA== X-IronPort-AV: E=McAfee;i="6000,8403,9824"; a="161067208" X-IronPort-AV: E=Sophos;i="5.78,390,1599548400"; d="scan'208";a="161067208" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Dec 2020 15:51:03 -0800 IronPort-SDR: o4MSW7e1g9kmXPv5Q4GbfMDFEYneGg6OYevAE9WpsXSDta0M+9YKu6OWqD2f/ACfWaOyJmG2Ig PFZNo/44IV/Q== X-IronPort-AV: E=Sophos;i="5.78,390,1599548400"; d="scan'208";a="550716505" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 03 Dec 2020 15:51:03 -0800 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Thu, 3 Dec 2020 15:53:55 -0800 Message-Id: <20201203235358.18041-6-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20201203235358.18041-1-manasi.d.navare@intel.com> References: <20201203235358.18041-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v3 6/9] drm/i915/display/vrr: Send VRR push to flip the frame X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" VRR achieves vblank stretching using the HW PUSH functionality. So once the VRR is enabled during modeset then for each flip request from userspace, in the atomic tail pipe_update_end() we need to set the VRR push bit in HW for it to terminate the vblank at configured flipline or anytime after flipline or latest at the Vmax. Also in case of VRR, we need to stall the double buffer updates and PUSH if too close to the Vmax. The HW clears the PUSH bit after the double buffer updates are completed. v2: * Move send push to after irq en (Manasi) * Call send push unconditionally (Jani N) v3: * Stall w.r.t Vrr vmax (Manasi, Gary Smith) Cc: Ville Syrjälä Cc: Gary Smith Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_sprite.c | 11 +++++++++++ drivers/gpu/drm/i915/display/intel_vrr.c | 19 +++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 3 files changed, 31 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c index b7e208816074..744f2ffec1fd 100644 --- a/drivers/gpu/drm/i915/display/intel_sprite.c +++ b/drivers/gpu/drm/i915/display/intel_sprite.c @@ -49,6 +49,7 @@ #include "intel_psr.h" #include "intel_dsi.h" #include "intel_sprite.h" +#include "intel_vrr.h" int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode, int usecs) @@ -98,6 +99,13 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) VBLANK_EVASION_TIME_US); max = vblank_start - 1; + /* In case of VRR, we stall the Push and updates if too close to Vmax */ + if (new_crtc_state->vrr.enable) { + min = new_crtc_state->vrr.vtotalmax - intel_usecs_to_scanlines(adjusted_mode, + VBLANK_EVASION_TIME_US); + max = new_crtc_state->vrr.vtotalmax - 1; + } + if (min <= 0 || max <= 0) goto irq_disable; @@ -257,6 +265,9 @@ void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state) local_irq_enable(); + /* Send VRR Push to terminate Vblank */ + intel_vrr_send_push(new_crtc_state); + if (intel_vgpu_active(dev_priv)) return; diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 9dec01695773..3597a53887dd 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -114,3 +114,22 @@ void intel_vrr_enable(struct intel_encoder *encoder, crtc_state->vrr.vtotalmin, trans_vrr_ctl, TRANS_PUSH_EN); } + +void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + u32 trans_push; + + if (!crtc_state->vrr.enable) + return; + + trans_push = intel_de_read(dev_priv, TRANS_PUSH(pipe)); + trans_push |= TRANS_PUSH_SEND; + intel_de_write(dev_priv, TRANS_PUSH(pipe), trans_push); + drm_WARN_ON(&dev_priv->drm, !(trans_push & TRANS_PUSH_EN)); + + drm_dbg_kms(&dev_priv->drm, "Sending VRR Push on pipe %c\n", + pipe_name(pipe)); +} diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 97bbbfb4c33b..112e40147e35 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -21,5 +21,6 @@ void intel_vrr_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state); void intel_vrr_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); +void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */