From patchwork Wed Jan 13 22:09:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 12017909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2C86DC433E0 for ; Wed, 13 Jan 2021 22:05:41 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CC33C23382 for ; Wed, 13 Jan 2021 22:05:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CC33C23382 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F3296EC76; Wed, 13 Jan 2021 22:05:33 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id ED7D06E8BF for ; Wed, 13 Jan 2021 22:05:30 +0000 (UTC) IronPort-SDR: tx8QWwVH1d8ouuHJZormIeKBTlANjyVEfp3/By+8th2GpdUbt+UKphKsms+AEPPweoFm944XEE qjAUxhly82Eg== X-IronPort-AV: E=McAfee;i="6000,8403,9863"; a="177498732" X-IronPort-AV: E=Sophos;i="5.79,345,1602572400"; d="scan'208";a="177498732" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Jan 2021 14:05:30 -0800 IronPort-SDR: LKdlmKWkcAetIGII4GstqpayRrgNa44g409GwB2tMMJhJWlYifGQtKu/9KlGqyI07yIk3H4JfI xTFsyRP/2SYg== X-IronPort-AV: E=Sophos;i="5.79,345,1602572400"; d="scan'208";a="400696551" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 13 Jan 2021 14:05:30 -0800 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Wed, 13 Jan 2021 14:09:19 -0800 Message-Id: <20210113220935.4151-3-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20210113220935.4151-1-manasi.d.navare@intel.com> References: <20210113220935.4151-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v4 02/18] drm/i915/display/dp: Attach and set drm connector VRR property X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Aditya Swarup This function sets the VRR property for connector based on the platform support, EDID monitor range and DP sink DPCD capability of outputing video without msa timing information. v8: * Use HAS_VRR, remove drm_conn declaration (Jani N) * Fix typos in Comment (Jani N) v7: * Move the helper to separate file (Manasi) v6: * Remove unset of prop v5: * Fix the vrr prop not being set in kernel (Manasi) * Unset the prop on connector disconnect (Manasi) v4: * Rebase (Mansi) v3: * intel_dp_is_vrr_capable can be used for debugfs, make it non static (Manasi) v2: * Just set this in intel_dp_get_modes instead of new hook (Jani) Cc: Ville Syrjälä Cc: Jani Nikula Signed-off-by: Aditya Swarup Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++++ drivers/gpu/drm/i915/display/intel_vrr.c | 4 ++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0433b6394137..dd093ae5b8bb 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -62,6 +62,7 @@ #include "intel_sideband.h" #include "intel_tc.h" #include "intel_vdsc.h" +#include "intel_vrr.h" #define DP_DPRX_ESI_LEN 14 @@ -7235,6 +7236,10 @@ static int intel_dp_get_modes(struct drm_connector *connector) edid = intel_connector->detect_edid; if (edid) { int ret = intel_connector_update_modes(connector, edid); + + if (intel_vrr_is_capable(connector)) + drm_connector_set_vrr_capable_property(connector, + true); if (ret) return ret; } @@ -7719,6 +7724,9 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect connector->state->scaling_mode = DRM_MODE_SCALE_ASPECT; } + + if (HAS_VRR(dev_priv)) + drm_connector_attach_vrr_capable_property(connector); } static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 8a427c152341..869e41aa8396 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -20,10 +20,10 @@ bool intel_vrr_is_capable(struct drm_connector *connector) intel_dp = intel_attached_dp(to_intel_connector(connector)); /* - * DP Sink is capable of Variable refresh video timings if + * DP Sink is capable of VRR video timings if * Ignore MSA bit is set in DPCD. * EDID monitor range also should be atleast 10 for reasonable - * Adaptive sync/ VRR end user experience. + * Adaptive Sync or Variable Refresh Rate end user experience. */ return HAS_VRR(i915) && drm_dp_sink_can_do_video_without_timing_msa(intel_dp->dpcd) &&