From patchwork Fri Jan 22 23:26:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Navare, Manasi" X-Patchwork-Id: 12040885 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06E97C433DB for ; Fri, 22 Jan 2021 23:22:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BB84C23B51 for ; Fri, 22 Jan 2021 23:22:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BB84C23B51 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 77CB36EA7F; Fri, 22 Jan 2021 23:22:40 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 362B26EA76 for ; Fri, 22 Jan 2021 23:22:32 +0000 (UTC) IronPort-SDR: mn8fII+IvD7JrTLpSWXeO5R8I9GRTv7KBdGP0G9HRGO8TFKTx86DLPv7EO9hKxlfuP+KVzGltj /LVHGKFK1lfA== X-IronPort-AV: E=McAfee;i="6000,8403,9872"; a="264344456" X-IronPort-AV: E=Sophos;i="5.79,367,1602572400"; d="scan'208";a="264344456" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2021 15:22:30 -0800 IronPort-SDR: VtoYXKOy9P3oXQfGruCMYDbMWLaUKX6oOuqoGJ0lrZrnTZTWnp6PXvnRik6Lmc+4A7uxg08g2X wz7iOvYxpYTw== X-IronPort-AV: E=Sophos;i="5.79,367,1602572400"; d="scan'208";a="392466026" Received: from labuser-z97x-ud5h.jf.intel.com ([10.165.21.211]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 22 Jan 2021 15:22:29 -0800 From: Manasi Navare To: intel-gfx@lists.freedesktop.org Date: Fri, 22 Jan 2021 15:26:41 -0800 Message-Id: <20210122232647.22688-12-manasi.d.navare@intel.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20210122232647.22688-1-manasi.d.navare@intel.com> References: <20210122232647.22688-1-manasi.d.navare@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [CI v5 12/18] drm/i915/display/vrr: Disable VRR in modeset disable path X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" This patch disables the VRR enable and VRR PUSH bits in the HW during commit modeset disable sequence. Thsi disable will happen when the port is disabled or when the userspace sets VRR prop to false and requests to disable VRR. v2: * Use intel_de_rmw (Jani N) v3: * Remove rmw (Ville) Cc: Ville Syrjälä Signed-off-by: Manasi Navare Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ drivers/gpu/drm/i915/display/intel_vrr.c | 13 +++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 1 + 3 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index d1cb0499a5c4..704856b445b1 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4060,6 +4060,8 @@ static void intel_ddi_post_disable(struct intel_atomic_state *state, intel_disable_pipe(old_crtc_state); + intel_vrr_disable(old_crtc_state); + intel_ddi_disable_transcoder_func(old_crtc_state); intel_dsc_disable(old_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 4596a18857fe..776b8c5f93a4 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -134,3 +134,16 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN | TRANS_PUSH_SEND); } + +void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc); + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder; + + if (!old_crtc_state->vrr.enable) + return; + + intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 0); + intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0); +} diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 1b7c53b5604a..43379c2bd4d9 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -23,5 +23,6 @@ void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, void intel_vrr_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); +void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); #endif /* __INTEL_VRR_H__ */