Message ID | 20210122232647.22688-15-manasi.d.navare@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [CI,v5,01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check | expand |
On Fri, Jan 22, 2021 at 03:26:44PM -0800, Manasi Navare wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > With VRR the earliest the registers can get latched are at > flipline decision boundary, calculate that as vrr_vmin_vblank_start() > and the latest the regsiters can get latched are vmax decision boundary > calculate that as vrr_vmax_vblank_start() > > v2: > * Remove TODO and adjust extra scanline const (Manasi) > > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> > --- > drivers/gpu/drm/i915/display/intel_vrr.c | 36 ++++++++++++++++++++++++ > drivers/gpu/drm/i915/display/intel_vrr.h | 2 ++ > 2 files changed, 38 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c > index c71254563a10..49ff5add90e0 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > @@ -45,6 +45,42 @@ intel_vrr_check_modeset(struct intel_atomic_state *state) > } > } > > +/* > + * Without VRR registers get latched at: > + * vblank_start > + * > + * With VRR the earliest registers can get latched is: > + * intel_vrr_vmin_vblank_start(), which if we want to maintain > + * the correct min vtotal is >=vblank_start+1 > + * > + * The latest point registers can get latched is the vmax decision boundary: > + * intel_vrr_vmax_vblank_start() > + * > + * Between those two points the vblank exit starts (and hence registers get > + * latched) ASAP after a push is sent. > + * > + * framestart_delay is programmable 0-3. "1-4" now > + */ > +static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); > + struct drm_i915_private *i915 = to_i915(crtc->base.dev); > + > + /* The hw imposes the extra scanline before frame start */ > + return crtc_state->vrr.pipeline_full + i915->framestart_delay + 1; > +} > + > +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state) > +{ > + /* Min vblank actually determined by flipline that is always >=vmin+1 */ > + return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state); > +} > + > +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state) > +{ > + return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state); > +} > + > void > intel_vrr_compute_config(struct intel_crtc_state *crtc_state, > struct drm_connector_state *conn_state) > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h > index 7610051edad2..d8b6b45557ca 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.h > +++ b/drivers/gpu/drm/i915/display/intel_vrr.h > @@ -27,5 +27,7 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); > void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); > void intel_vrr_get_config(struct intel_crtc *crtc, > struct intel_crtc_state *crtc_state); > +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); > +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); > > #endif /* __INTEL_VRR_H__ */ > -- > 2.19.1
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index c71254563a10..49ff5add90e0 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -45,6 +45,42 @@ intel_vrr_check_modeset(struct intel_atomic_state *state) } } +/* + * Without VRR registers get latched at: + * vblank_start + * + * With VRR the earliest registers can get latched is: + * intel_vrr_vmin_vblank_start(), which if we want to maintain + * the correct min vtotal is >=vblank_start+1 + * + * The latest point registers can get latched is the vmax decision boundary: + * intel_vrr_vmax_vblank_start() + * + * Between those two points the vblank exit starts (and hence registers get + * latched) ASAP after a push is sent. + * + * framestart_delay is programmable 0-3. + */ +static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_i915_private *i915 = to_i915(crtc->base.dev); + + /* The hw imposes the extra scanline before frame start */ + return crtc_state->vrr.pipeline_full + i915->framestart_delay + 1; +} + +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state) +{ + /* Min vblank actually determined by flipline that is always >=vmin+1 */ + return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state); +} + +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state) +{ + return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state); +} + void intel_vrr_compute_config(struct intel_crtc_state *crtc_state, struct drm_connector_state *conn_state) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 7610051edad2..d8b6b45557ca 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -27,5 +27,7 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state); void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state); void intel_vrr_get_config(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state); +int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state); +int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state); #endif /* __INTEL_VRR_H__ */