From patchwork Mon Jan 25 14:07:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aditya Swarup X-Patchwork-Id: 12043539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 33BE4C433DB for ; Mon, 25 Jan 2021 14:09:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ECC7122C9E for ; Mon, 25 Jan 2021 14:09:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ECC7122C9E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B4536E18F; Mon, 25 Jan 2021 14:08:57 +0000 (UTC) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id DCB606E161 for ; Mon, 25 Jan 2021 14:08:51 +0000 (UTC) IronPort-SDR: 417JAU773IU5AGB6eZHVLTiyATk3BcKa9/7PTq8NCqo2w6flJuvEqjTCmyPnxulmWWMYD6EabS eeAmC5MpgusQ== X-IronPort-AV: E=McAfee;i="6000,8403,9874"; a="179879126" X-IronPort-AV: E=Sophos;i="5.79,373,1602572400"; d="scan'208";a="179879126" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2021 06:08:35 -0800 IronPort-SDR: FavDwQXh0BaKLWRxjBje5mpHZd1/1/9H6YvVXChSM+jGafMvyTVEufxQ3Wfc7mLxG1/Nn98bVk mLtJQ5e7IVBw== X-IronPort-AV: E=Sophos;i="5.79,373,1602572400"; d="scan'208";a="472319599" Received: from iduggana-mobl.amr.corp.intel.com (HELO aswarup-mobl.amr.corp.intel.com) ([10.254.81.9]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Jan 2021 06:08:34 -0800 From: Aditya Swarup To: intel-gfx@lists.freedesktop.org Date: Mon, 25 Jan 2021 06:07:50 -0800 Message-Id: <20210125140753.347998-8-aditya.swarup@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210125140753.347998-1-aditya.swarup@intel.com> References: <20210125140753.347998-1-aditya.swarup@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 07/10] drm/i915/adl_s: Initialize display for ADL-S X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Lucas De Marchi Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Initialize display outputs for ADL-S. ADL-S has 5 display outputs -> 1 eDP, 2 HDMI and 2 DP++ outputs. v2: - Use PORT_TCx instead of PORT_D,E.. to stay consistent with other platforms.(mdroper) Cc: Jani Nikula Cc: Ville Syrjälä Cc: Imre Deak Cc: Matt Roper Cc: Lucas De Marchi Signed-off-by: Aditya Swarup Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/i915/display/intel_display.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 83ac0a7a59f0..eaec5cd1a144 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13897,7 +13897,13 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; - if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) { + if (IS_ALDERLAKE_S(dev_priv)) { + intel_ddi_init(dev_priv, PORT_A); + intel_ddi_init(dev_priv, PORT_TC1); + intel_ddi_init(dev_priv, PORT_TC2); + intel_ddi_init(dev_priv, PORT_TC3); + intel_ddi_init(dev_priv, PORT_TC4); + } else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) { intel_ddi_init(dev_priv, PORT_A); intel_ddi_init(dev_priv, PORT_B); intel_ddi_init(dev_priv, PORT_TC1);