Message ID | 20210201230133.19221-1-anusha.srivatsa@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/dg1: Add GuC and HuC support | expand |
Quoting Anusha Srivatsa (2021-02-01 23:01:33)
> Add support to load GuC and HuC firmware for Dg1.
Do you have the corresponding link for the linux-firmware.git? That is
useful for cross referencing that the target version does exist in the
public repository.
-Chris
> -----Original Message----- > From: Chris Wilson <chris@chris-wilson.co.uk> > Sent: Monday, February 1, 2021 3:05 PM > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- > gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Add GuC and HuC support > > Quoting Anusha Srivatsa (2021-02-01 23:01:33) > > Add support to load GuC and HuC firmware for Dg1. > > Do you have the corresponding link for the linux-firmware.git? That is > useful for cross referencing that the target version does exist in the public > repository. I am waiting for CI runs before I can propagate it to linux-firmware.git. Anusha > -Chris
Quoting Srivatsa, Anusha (2021-02-01 23:19:40) > > > > -----Original Message----- > > From: Chris Wilson <chris@chris-wilson.co.uk> > > Sent: Monday, February 1, 2021 3:05 PM > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- > > gfx@lists.freedesktop.org > > Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Add GuC and HuC support > > > > Quoting Anusha Srivatsa (2021-02-01 23:01:33) > > > Add support to load GuC and HuC firmware for Dg1. > > > > Do you have the corresponding link for the linux-firmware.git? That is > > useful for cross referencing that the target version does exist in the public > > repository. > > I am waiting for CI runs before I can propagate it to linux-firmware.git. From upstream CI? We don't have guc loading enabled for dg1, or much of dg1 for that matter. Best we can do is compile check :( -Chris
> -----Original Message----- > From: Chris Wilson <chris@chris-wilson.co.uk> > Sent: Monday, February 1, 2021 3:22 PM > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- > gfx@lists.freedesktop.org > Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Add GuC and HuC support > > Quoting Srivatsa, Anusha (2021-02-01 23:19:40) > > > > > > > -----Original Message----- > > > From: Chris Wilson <chris@chris-wilson.co.uk> > > > Sent: Monday, February 1, 2021 3:05 PM > > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- > > > gfx@lists.freedesktop.org > > > Subject: Re: [Intel-gfx] [PATCH] drm/i915/dg1: Add GuC and HuC > > > support > > > > > > Quoting Anusha Srivatsa (2021-02-01 23:01:33) > > > > Add support to load GuC and HuC firmware for Dg1. > > > > > > Do you have the corresponding link for the linux-firmware.git? That > > > is useful for cross referencing that the target version does exist > > > in the public repository. > > > > I am waiting for CI runs before I can propagate it to linux-firmware.git. > > From upstream CI? We don't have guc loading enabled for dg1, or much of > dg1 for that matter. Best we can do is compile check :( -Chris Totally missed that bit. I will go ahead with propagating PR to linux-firmware first. It might be sometime till we have DG1 working on CI. Anusha
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index 984fa79e0fa7..0e63881674a4 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -48,6 +48,7 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, * firmware as TGL. */ #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \ + fw_def(DG1, 0, guc_def(dg1, 49, 0, 1), huc_def(dg1, 7, 7, 1)) \ fw_def(ALDERLAKE_S, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ fw_def(ROCKETLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \ fw_def(TIGERLAKE, 0, guc_def(tgl, 49, 0, 1), huc_def(tgl, 7, 5, 0)) \
Add support to load GuC and HuC firmware for Dg1. Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 + 1 file changed, 1 insertion(+)