| Message ID | 20210209181439.215104-3-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr | expand |
On Tue, 2021-02-09 at 10:14 -0800, José Roberto de Souza wrote: > If source_support is set the platform supports PSR so no need to > check > it again at every CAN_PSR(). > > Also removing the intel_dp_is_edp() calls, if sink_support is set > the sink connected is for sure a eDP panel. > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display_types.h | 5 ++--- > drivers/gpu/drm/i915/display/intel_dp.c | 2 +- > drivers/gpu/drm/i915/display/intel_psr.c | 4 ++-- > 3 files changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h > b/drivers/gpu/drm/i915/display/intel_display_types.h > index ebaa9d0ed376..4a46c4e9b0ac 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1793,9 +1793,8 @@ dp_to_i915(struct intel_dp *intel_dp) > return to_i915(dp_to_dig_port(intel_dp)->base.base.dev); > } > > -#define CAN_PSR(intel_dp) (HAS_PSR(dp_to_i915(intel_dp)) && \ > - (intel_dp)->psr.sink_support && \ > - (intel_dp)->psr.source_support) > +#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \ > + (intel_dp)->psr.source_support) > > static inline bool intel_encoder_can_psr(struct intel_encoder > *encoder) > { > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > index 4f89e0de5dde..0a0cc61344c4 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2358,7 +2358,7 @@ bool intel_dp_initial_fastset_check(struct > intel_encoder *encoder, > return false; > } > > - if (CAN_PSR(intel_dp) && intel_dp_is_edp(intel_dp)) { > + if (CAN_PSR(intel_dp)) { > drm_dbg_kms(&i915->drm, "Forcing full modeset to > compute PSR state\n"); > crtc_state->uapi.mode_changed = true; > return false; > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 8ad9fcff3a12..e0111b470570 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1962,7 +1962,7 @@ void intel_psr_short_pulse(struct intel_dp > *intel_dp) > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR | > DP_PSR_LINK_CRC_ERROR; > > - if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp)) > + if (!CAN_PSR(intel_dp)) > return; > > mutex_lock(&psr->lock); > @@ -2012,7 +2012,7 @@ bool intel_psr_enabled(struct intel_dp > *intel_dp) > { > bool ret; > > - if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp)) > + if (!CAN_PSR(intel_dp)) > return false; > > mutex_lock(&intel_dp->psr.lock); Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index ebaa9d0ed376..4a46c4e9b0ac 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1793,9 +1793,8 @@ dp_to_i915(struct intel_dp *intel_dp) return to_i915(dp_to_dig_port(intel_dp)->base.base.dev); } -#define CAN_PSR(intel_dp) (HAS_PSR(dp_to_i915(intel_dp)) && \ - (intel_dp)->psr.sink_support && \ - (intel_dp)->psr.source_support) +#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \ + (intel_dp)->psr.source_support) static inline bool intel_encoder_can_psr(struct intel_encoder *encoder) { diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 4f89e0de5dde..0a0cc61344c4 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2358,7 +2358,7 @@ bool intel_dp_initial_fastset_check(struct intel_encoder *encoder, return false; } - if (CAN_PSR(intel_dp) && intel_dp_is_edp(intel_dp)) { + if (CAN_PSR(intel_dp)) { drm_dbg_kms(&i915->drm, "Forcing full modeset to compute PSR state\n"); crtc_state->uapi.mode_changed = true; return false; diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 8ad9fcff3a12..e0111b470570 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1962,7 +1962,7 @@ void intel_psr_short_pulse(struct intel_dp *intel_dp) DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR | DP_PSR_LINK_CRC_ERROR; - if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp)) + if (!CAN_PSR(intel_dp)) return; mutex_lock(&psr->lock); @@ -2012,7 +2012,7 @@ bool intel_psr_enabled(struct intel_dp *intel_dp) { bool ret; - if (!CAN_PSR(intel_dp) || !intel_dp_is_edp(intel_dp)) + if (!CAN_PSR(intel_dp)) return false; mutex_lock(&intel_dp->psr.lock);
If source_support is set the platform supports PSR so no need to check it again at every CAN_PSR(). Also removing the intel_dp_is_edp() calls, if sink_support is set the sink connected is for sure a eDP panel. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_display_types.h | 5 ++--- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- drivers/gpu/drm/i915/display/intel_psr.c | 4 ++-- 3 files changed, 5 insertions(+), 6 deletions(-)