| Message ID | 20210212182201.155043-1-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] drm/i915/display/adl_s: Fix dpclka_cfgcr0_clk_off mapping | expand |
On 2/12/21 10:21 AM, José Roberto de Souza wrote: > The cfgcr0/1_clk_off mapping is wrong for adl-s what could cause > the wrong clock being disabled and leaving a not needed clock > running consuming more power than needed. > > Bspec: 50287 > Bspec: 53812 > Bspec: 53723 > Fixes: d6d2bc996e45 ("drm/i915/adl_s: Configure Port clock registers for ADL-S") > Cc: Aditya Swarup <aditya.swarup@intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Changes look correct to me based on the table from Bspec: 53723 and is required. Mistake on my part on missing those changes. Reviewed-by: Aditya Swarup <aditya.swarup@intel.com> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- > drivers/gpu/drm/i915/i915_reg.h | 12 ++++++++++++ > 2 files changed, 15 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 2d6906f6995f..7631e080349d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -1585,7 +1585,9 @@ hsw_set_signal_levels(struct intel_dp *intel_dp, > static u32 icl_dpclka_cfgcr0_clk_off(struct drm_i915_private *dev_priv, > enum phy phy) > { > - if (IS_ROCKETLAKE(dev_priv)) { > + if (IS_ALDERLAKE_S(dev_priv)) { > + return ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy); > + } else if (IS_ROCKETLAKE(dev_priv)) { > return RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > } else if (intel_phy_is_combo(dev_priv, phy)) { > return ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 224ad897af34..7c69b50ccc5c 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -10416,6 +10416,18 @@ enum skl_power_gate { > ADLS_DPCLKA_DDIJ_SEL_MASK, \ > ADLS_DPCLKA_DDIK_SEL_MASK) > > +#define _ADLS_DPCLKA_DDIA_CLK_OFF REG_BIT(10) > +#define _ADLS_DPCLKA_DDIB_CLK_OFF REG_BIT(11) > +#define _ADLS_DPCLKA_DDII_CLK_OFF REG_BIT(24) > +#define _ADLS_DPCLKA_DDIJ_CLK_OFF REG_BIT(4) > +#define _ADLS_DPCLKA_DDIK_CLK_OFF REG_BIT(5) > +#define ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy) _PICK((phy), \ > + _ADLS_DPCLKA_DDIA_CLK_OFF, \ > + _ADLS_DPCLKA_DDIB_CLK_OFF, \ > + _ADLS_DPCLKA_DDII_CLK_OFF, \ > + _ADLS_DPCLKA_DDIJ_CLK_OFF, \ > + _ADLS_DPCLKA_DDIK_CLK_OFF) > + > /* CNL PLL */ > #define DPLL0_ENABLE 0x46010 > #define DPLL1_ENABLE 0x46014 >
On Fri, Feb 12, 2021 at 10:21:59AM -0800, José Roberto de Souza wrote: > The cfgcr0/1_clk_off mapping is wrong for adl-s what could cause > the wrong clock being disabled and leaving a not needed clock > running consuming more power than needed. > > Bspec: 50287 > Bspec: 53812 > Bspec: 53723 > Fixes: d6d2bc996e45 ("drm/i915/adl_s: Configure Port clock registers for ADL-S") > Cc: Aditya Swarup <aditya.swarup@intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- > drivers/gpu/drm/i915/i915_reg.h | 12 ++++++++++++ > 2 files changed, 15 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > index 2d6906f6995f..7631e080349d 100644 > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > @@ -1585,7 +1585,9 @@ hsw_set_signal_levels(struct intel_dp *intel_dp, > static u32 icl_dpclka_cfgcr0_clk_off(struct drm_i915_private *dev_priv, > enum phy phy) > { > - if (IS_ROCKETLAKE(dev_priv)) { > + if (IS_ALDERLAKE_S(dev_priv)) { > + return ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy); > + } else if (IS_ROCKETLAKE(dev_priv)) { > return RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > } else if (intel_phy_is_combo(dev_priv, phy)) { > return ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 224ad897af34..7c69b50ccc5c 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -10416,6 +10416,18 @@ enum skl_power_gate { > ADLS_DPCLKA_DDIJ_SEL_MASK, \ > ADLS_DPCLKA_DDIK_SEL_MASK) > > +#define _ADLS_DPCLKA_DDIA_CLK_OFF REG_BIT(10) > +#define _ADLS_DPCLKA_DDIB_CLK_OFF REG_BIT(11) > +#define _ADLS_DPCLKA_DDII_CLK_OFF REG_BIT(24) > +#define _ADLS_DPCLKA_DDIJ_CLK_OFF REG_BIT(4) > +#define _ADLS_DPCLKA_DDIK_CLK_OFF REG_BIT(5) So shose are apparently split between the two registers. Why aren't we defining these so that it would be obvious which register they live in? This stuff is confusing enough with the hw folks churning the bits around randomly on every platform, so I don't think we should add to the confusion by obfuscating the bit defines. I do like that you named the bits, which isn't case for the other platforms. Would be nice to fix it all up actually. Hmm. However, this new defintion seem to match ICL_DPCLKA_CFGCR0_DDI_CLK_OFF() 100%. So how can this be fixing something? Also ICL for sure can't have that many combo PHYs can it? We should nuke the extra stuff from the ICL defintion if it's no longer used. > +#define ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy) _PICK((phy), \ > + _ADLS_DPCLKA_DDIA_CLK_OFF, \ > + _ADLS_DPCLKA_DDIB_CLK_OFF, \ > + _ADLS_DPCLKA_DDII_CLK_OFF, \ > + _ADLS_DPCLKA_DDIJ_CLK_OFF, \ > + _ADLS_DPCLKA_DDIK_CLK_OFF) > + > /* CNL PLL */ > #define DPLL0_ENABLE 0x46010 > #define DPLL1_ENABLE 0x46014 > -- > 2.30.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Fri, 2021-02-12 at 21:20 +0200, Ville Syrjälä wrote: > On Fri, Feb 12, 2021 at 10:21:59AM -0800, José Roberto de Souza wrote: > > The cfgcr0/1_clk_off mapping is wrong for adl-s what could cause > > the wrong clock being disabled and leaving a not needed clock > > running consuming more power than needed. > > > > Bspec: 50287 > > Bspec: 53812 > > Bspec: 53723 > > Fixes: d6d2bc996e45 ("drm/i915/adl_s: Configure Port clock registers for ADL-S") > > Cc: Aditya Swarup <aditya.swarup@intel.com> > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > Cc: Matt Roper <matthew.d.roper@intel.com> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- > > drivers/gpu/drm/i915/i915_reg.h | 12 ++++++++++++ > > 2 files changed, 15 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > > index 2d6906f6995f..7631e080349d 100644 > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > > @@ -1585,7 +1585,9 @@ hsw_set_signal_levels(struct intel_dp *intel_dp, > > static u32 icl_dpclka_cfgcr0_clk_off(struct drm_i915_private *dev_priv, > > enum phy phy) > > { > > - if (IS_ROCKETLAKE(dev_priv)) { > > + if (IS_ALDERLAKE_S(dev_priv)) { > > + return ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy); > > + } else if (IS_ROCKETLAKE(dev_priv)) { > > return RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > > } else if (intel_phy_is_combo(dev_priv, phy)) { > > return ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > index 224ad897af34..7c69b50ccc5c 100644 > > --- a/drivers/gpu/drm/i915/i915_reg.h > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > @@ -10416,6 +10416,18 @@ enum skl_power_gate { > > ADLS_DPCLKA_DDIJ_SEL_MASK, \ > > ADLS_DPCLKA_DDIK_SEL_MASK) > > > > > > +#define _ADLS_DPCLKA_DDIA_CLK_OFF REG_BIT(10) > > +#define _ADLS_DPCLKA_DDIB_CLK_OFF REG_BIT(11) > > +#define _ADLS_DPCLKA_DDII_CLK_OFF REG_BIT(24) > > +#define _ADLS_DPCLKA_DDIJ_CLK_OFF REG_BIT(4) > > +#define _ADLS_DPCLKA_DDIK_CLK_OFF REG_BIT(5) > > So shose are apparently split between the two registers. Why aren't > we defining these so that it would be obvious which register they > live in? This stuff is confusing enough with the hw folks churning > the bits around randomly on every platform, so I don't think we > should add to the confusion by obfuscating the bit defines. I do > like that you named the bits, which isn't case for the other > platforms. Would be nice to fix it all up actually. > > Hmm. However, this new defintion seem to match > ICL_DPCLKA_CFGCR0_DDI_CLK_OFF() 100%. So how can this be fixing > something? Also ICL for sure can't have that many combo PHYs can > it? We should nuke the extra stuff from the ICL defintion if it's > no longer used. Good catch & my bad. Was fixing it for other platform and tought that it might be broken for ADL-S too but as all ports are combo ports ICL_DPCLKA_CFGCR0_DDI_CLK_OFF will do the right job. Dropping this patch. > > > +#define ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy) _PICK((phy), \ > > + _ADLS_DPCLKA_DDIA_CLK_OFF, \ > > + _ADLS_DPCLKA_DDIB_CLK_OFF, \ > > + _ADLS_DPCLKA_DDII_CLK_OFF, \ > > + _ADLS_DPCLKA_DDIJ_CLK_OFF, \ > > + _ADLS_DPCLKA_DDIK_CLK_OFF) > > + > > /* CNL PLL */ > > #define DPLL0_ENABLE 0x46010 > > #define DPLL1_ENABLE 0x46014 > > -- > > 2.30.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx >
On Fri, Feb 12, 2021 at 07:42:17PM +0000, Souza, Jose wrote: > On Fri, 2021-02-12 at 21:20 +0200, Ville Syrjälä wrote: > > On Fri, Feb 12, 2021 at 10:21:59AM -0800, José Roberto de Souza wrote: > > > The cfgcr0/1_clk_off mapping is wrong for adl-s what could cause > > > the wrong clock being disabled and leaving a not needed clock > > > running consuming more power than needed. > > > > > > Bspec: 50287 > > > Bspec: 53812 > > > Bspec: 53723 > > > Fixes: d6d2bc996e45 ("drm/i915/adl_s: Configure Port clock registers for ADL-S") > > > Cc: Aditya Swarup <aditya.swarup@intel.com> > > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > > Cc: Matt Roper <matthew.d.roper@intel.com> > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- > > > drivers/gpu/drm/i915/i915_reg.h | 12 ++++++++++++ > > > 2 files changed, 15 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > > > index 2d6906f6995f..7631e080349d 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > > > @@ -1585,7 +1585,9 @@ hsw_set_signal_levels(struct intel_dp *intel_dp, > > > static u32 icl_dpclka_cfgcr0_clk_off(struct drm_i915_private *dev_priv, > > > enum phy phy) > > > { > > > - if (IS_ROCKETLAKE(dev_priv)) { > > > + if (IS_ALDERLAKE_S(dev_priv)) { > > > + return ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy); > > > + } else if (IS_ROCKETLAKE(dev_priv)) { > > > return RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > > > } else if (intel_phy_is_combo(dev_priv, phy)) { > > > return ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > > index 224ad897af34..7c69b50ccc5c 100644 > > > --- a/drivers/gpu/drm/i915/i915_reg.h > > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > > @@ -10416,6 +10416,18 @@ enum skl_power_gate { > > > ADLS_DPCLKA_DDIJ_SEL_MASK, \ > > > ADLS_DPCLKA_DDIK_SEL_MASK) > > > > > > > > > +#define _ADLS_DPCLKA_DDIA_CLK_OFF REG_BIT(10) > > > +#define _ADLS_DPCLKA_DDIB_CLK_OFF REG_BIT(11) > > > +#define _ADLS_DPCLKA_DDII_CLK_OFF REG_BIT(24) > > > +#define _ADLS_DPCLKA_DDIJ_CLK_OFF REG_BIT(4) > > > +#define _ADLS_DPCLKA_DDIK_CLK_OFF REG_BIT(5) > > > > So shose are apparently split between the two registers. Why aren't > > we defining these so that it would be obvious which register they > > live in? This stuff is confusing enough with the hw folks churning > > the bits around randomly on every platform, so I don't think we > > should add to the confusion by obfuscating the bit defines. I do > > like that you named the bits, which isn't case for the other > > platforms. Would be nice to fix it all up actually. > > > > Hmm. However, this new defintion seem to match > > ICL_DPCLKA_CFGCR0_DDI_CLK_OFF() 100%. So how can this be fixing > > something? Also ICL for sure can't have that many combo PHYs can > > it? We should nuke the extra stuff from the ICL defintion if it's > > no longer used. > > Good catch & my bad. > Was fixing it for other platform and tought that it might be broken > for ADL-S too but as all ports are combo ports > ICL_DPCLKA_CFGCR0_DDI_CLK_OFF will do the right job. > > Dropping this patch. I wouldn't mind having this patch, or rather a patch to clean up/clarify all the DPCLKA_CFGCR bits on every platform. As it stands cross checking against the spec is a bit tedious. But at least right now I don't have to rebase my DDI clock routing series [1] :) That one still has a few trivial patches looking for review btw *wink* *nudge*. [1] https://patchwork.freedesktop.org/series/86544/
On Fri, 2021-02-12 at 23:17 +0200, Ville Syrjälä wrote: > On Fri, Feb 12, 2021 at 07:42:17PM +0000, Souza, Jose wrote: > > On Fri, 2021-02-12 at 21:20 +0200, Ville Syrjälä wrote: > > > On Fri, Feb 12, 2021 at 10:21:59AM -0800, José Roberto de Souza wrote: > > > > The cfgcr0/1_clk_off mapping is wrong for adl-s what could cause > > > > the wrong clock being disabled and leaving a not needed clock > > > > running consuming more power than needed. > > > > > > > > Bspec: 50287 > > > > Bspec: 53812 > > > > Bspec: 53723 > > > > Fixes: d6d2bc996e45 ("drm/i915/adl_s: Configure Port clock registers for ADL-S") > > > > Cc: Aditya Swarup <aditya.swarup@intel.com> > > > > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > > > > Cc: Matt Roper <matthew.d.roper@intel.com> > > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > > > --- > > > > drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- > > > > drivers/gpu/drm/i915/i915_reg.h | 12 ++++++++++++ > > > > 2 files changed, 15 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > > > > index 2d6906f6995f..7631e080349d 100644 > > > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > > > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > > > > @@ -1585,7 +1585,9 @@ hsw_set_signal_levels(struct intel_dp *intel_dp, > > > > static u32 icl_dpclka_cfgcr0_clk_off(struct drm_i915_private *dev_priv, > > > > enum phy phy) > > > > { > > > > - if (IS_ROCKETLAKE(dev_priv)) { > > > > + if (IS_ALDERLAKE_S(dev_priv)) { > > > > + return ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy); > > > > + } else if (IS_ROCKETLAKE(dev_priv)) { > > > > return RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > > > > } else if (intel_phy_is_combo(dev_priv, phy)) { > > > > return ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > > > > index 224ad897af34..7c69b50ccc5c 100644 > > > > --- a/drivers/gpu/drm/i915/i915_reg.h > > > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > > > @@ -10416,6 +10416,18 @@ enum skl_power_gate { > > > > ADLS_DPCLKA_DDIJ_SEL_MASK, \ > > > > ADLS_DPCLKA_DDIK_SEL_MASK) > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > +#define _ADLS_DPCLKA_DDIA_CLK_OFF REG_BIT(10) > > > > +#define _ADLS_DPCLKA_DDIB_CLK_OFF REG_BIT(11) > > > > +#define _ADLS_DPCLKA_DDII_CLK_OFF REG_BIT(24) > > > > +#define _ADLS_DPCLKA_DDIJ_CLK_OFF REG_BIT(4) > > > > +#define _ADLS_DPCLKA_DDIK_CLK_OFF REG_BIT(5) > > > > > > So shose are apparently split between the two registers. Why aren't > > > we defining these so that it would be obvious which register they > > > live in? This stuff is confusing enough with the hw folks churning > > > the bits around randomly on every platform, so I don't think we > > > should add to the confusion by obfuscating the bit defines. I do > > > like that you named the bits, which isn't case for the other > > > platforms. Would be nice to fix it all up actually. > > > > > > Hmm. However, this new defintion seem to match > > > ICL_DPCLKA_CFGCR0_DDI_CLK_OFF() 100%. So how can this be fixing > > > something? Also ICL for sure can't have that many combo PHYs can > > > it? We should nuke the extra stuff from the ICL defintion if it's > > > no longer used. > > > > Good catch & my bad. > > Was fixing it for other platform and tought that it might be broken > > for ADL-S too but as all ports are combo ports > > ICL_DPCLKA_CFGCR0_DDI_CLK_OFF will do the right job. > > > > Dropping this patch. > > I wouldn't mind having this patch, or rather a patch to clean up/clarify > all the DPCLKA_CFGCR bits on every platform. As it stands cross checking > against the spec is a bit tedious. Okay, will try to do something better around here. > > But at least right now I don't have to rebase my DDI clock routing > series [1] :) That one still has a few trivial patches looking for review > btw *wink* *nudge*. Lucas already did =] Let me know if you have anything else pending that is not huge. > > [1] https://patchwork.freedesktop.org/series/86544/ >
On Fri, 2021-02-12 at 20:15 +0000, Patchwork wrote:
Patch Details
Series: series starting with [1/3] drm/i915/display/adl_s: Fix dpclka_cfgcr0_clk_off mapping
URL: https://patchwork.freedesktop.org/series/87048/
State: success
Details: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/index.html
CI Bug Log - changes from CI_DRM_9771_full -> Patchwork_19672_full
Summary
SUCCESS
No regressions found.
Patch 2 pushed.
Thanks for the review Ville.
Known issues
Here are the changes found in Patchwork_19672_full that come from known issues:
IGT changes
Issues hit
* igt@gem_ctx_persistence@close-replace-race:
* shard-glk: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-glk4/igt@gem_ctx_persistence@close-replace-race.html> -> TIMEOUT<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-glk9/igt@gem_ctx_persistence@close-replace-race.html> ([i915#2918])
* igt@gem_exec_fair@basic-none-rrul@rcs0:
* shard-glk: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-glk5/igt@gem_exec_fair@basic-none-rrul@rcs0.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-glk1/igt@gem_exec_fair@basic-none-rrul@rcs0.html> ([i915#2842]) +1 similar issue
* igt@gem_exec_fair@basic-none-share@rcs0:
* shard-tglb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb3/igt@gem_exec_fair@basic-none-share@rcs0.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@gem_exec_fair@basic-none-share@rcs0.html> ([i915#2842])
* igt@gem_exec_fair@basic-pace-solo@rcs0:
* shard-iclb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb7/igt@gem_exec_fair@basic-pace-solo@rcs0.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb5/igt@gem_exec_fair@basic-pace-solo@rcs0.html> ([i915#2842]) +2 similar issues
* igt@gem_exec_fair@basic-pace@vcs1:
* shard-kbl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs1.html> ([i915#2842]) +1 similar issue
* igt@gem_exec_params@secure-non-master:
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@gem_exec_params@secure-non-master.html> (fdo#112283<https://bugs.freedesktop.org/show_bug.cgi?id=112283>)
* igt@gem_exec_schedule@u-fairslice@vcs0:
* shard-iclb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb6/igt@gem_exec_schedule@u-fairslice@vcs0.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb4/igt@gem_exec_schedule@u-fairslice@vcs0.html> ([i915#2803])
* igt@gem_exec_suspend@basic-s3:
* shard-kbl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-kbl4/igt@gem_exec_suspend@basic-s3.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl7/igt@gem_exec_suspend@basic-s3.html> (i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180>) +3 similar issues
* igt@gem_exec_whisper@basic-queues-forked:
* shard-glk: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-glk7/igt@gem_exec_whisper@basic-queues-forked.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-glk3/igt@gem_exec_whisper@basic-queues-forked.html> (i915#118<https://gitlab.freedesktop.org/drm/intel/issues/118> / [i915#95])
* igt@gen9_exec_parse@secure-batches:
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@gen9_exec_parse@secure-batches.html> (fdo#112306<https://bugs.freedesktop.org/show_bug.cgi?id=112306>)
* igt@kms_async_flips@alternate-sync-async-flip:
* shard-kbl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-kbl3/igt@kms_async_flips@alternate-sync-async-flip.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl2/igt@kms_async_flips@alternate-sync-async-flip.html> (i915#2521<https://gitlab.freedesktop.org/drm/intel/issues/2521>)
* igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html> (fdo#111615<https://bugs.freedesktop.org/show_bug.cgi?id=111615>)
* igt@kms_ccs@pipe-c-crc-primary-rotation-180:
* shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl8/igt@kms_ccs@pipe-c-crc-primary-rotation-180.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111304<https://bugs.freedesktop.org/show_bug.cgi?id=111304>)
* igt@kms_chamelium@hdmi-hpd-storm:
* shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl2/igt@kms_chamelium@hdmi-hpd-storm.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111827<https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +3 similar issues
* igt@kms_color_chamelium@pipe-a-ctm-green-to-red:
* shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl4/igt@kms_color_chamelium@pipe-a-ctm-green-to-red.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111827<https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +2 similar issues
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@kms_color_chamelium@pipe-a-ctm-green-to-red.html> (fdo#109284<https://bugs.freedesktop.org/show_bug.cgi?id=109284> / fdo#111827<https://bugs.freedesktop.org/show_bug.cgi?id=111827>)
* igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
* shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl9/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111827<https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +6 similar issues
* igt@kms_content_protection@legacy:
* shard-kbl: NOTRUN -> TIMEOUT<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl2/igt@kms_content_protection@legacy.html> (i915#1319<https://gitlab.freedesktop.org/drm/intel/issues/1319>)
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@kms_content_protection@legacy.html> (fdo#111828<https://bugs.freedesktop.org/show_bug.cgi?id=111828>)
* shard-apl: NOTRUN -> TIMEOUT<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl4/igt@kms_content_protection@legacy.html> (i915#1319<https://gitlab.freedesktop.org/drm/intel/issues/1319>)
* igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding:
* shard-skl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl2/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl8/igt@kms_cursor_crc@pipe-a-cursor-64x64-sliding.html> ([i915#54]) +4 similar issues
* igt@kms_cursor_crc@pipe-c-cursor-512x512-random:
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@kms_cursor_crc@pipe-c-cursor-512x512-random.html> (fdo#109279<https://bugs.freedesktop.org/show_bug.cgi?id=109279>)
* igt@kms_cursor_crc@pipe-d-cursor-128x42-sliding:
* shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl2/igt@kms_cursor_crc@pipe-d-cursor-128x42-sliding.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +40 similar issues
* igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic:
* shard-skl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-atomic.html> (i915#2346<https://gitlab.freedesktop.org/drm/intel/issues/2346>)
* igt@kms_flip@2x-flip-vs-panning:
* shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl4/igt@kms_flip@2x-flip-vs-panning.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +24 similar issues
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html> (fdo#111825<https://bugs.freedesktop.org/show_bug.cgi?id=111825>) +2 similar issues
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
* shard-skl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html> ([i915#79])
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
* shard-tglb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html> (i915#2598<https://gitlab.freedesktop.org/drm/intel/issues/2598>)
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
* shard-apl: NOTRUN -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html> (i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180>)
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
* shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / [i915#2672])
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
* shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +58 similar issues
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
* shard-skl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html> -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html> (i915#198<https://gitlab.freedesktop.org/drm/intel/issues/198>)
* shard-apl: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html> (i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180>) +1 similar issue
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
* shard-apl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html> (fdo#108145<https://bugs.freedesktop.org/show_bug.cgi?id=108145> / i915#265<https://gitlab.freedesktop.org/drm/intel/issues/265>)
* shard-kbl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html> (fdo#108145<https://bugs.freedesktop.org/show_bug.cgi?id=108145> / i915#265<https://gitlab.freedesktop.org/drm/intel/issues/265>)
* shard-skl: NOTRUN -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html> (fdo#108145<https://bugs.freedesktop.org/show_bug.cgi?id=108145> / i915#265<https://gitlab.freedesktop.org/drm/intel/issues/265>)
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
* shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl4/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / [i915#658]) +1 similar issue
* shard-skl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl4/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / [i915#658]) +1 similar issue
* shard-tglb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html> ([i915#2920])
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5:
* shard-kbl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / [i915#658]) +1 similar issue
* igt@kms_psr@psr2_sprite_plane_move:
* shard-iclb: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html> -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html> (fdo#109441<https://bugs.freedesktop.org/show_bug.cgi?id=109441>) +2 similar issues
* igt@perf@polling-parameterized:
* shard-glk: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-glk1/igt@perf@polling-parameterized.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-glk7/igt@perf@polling-parameterized.html> (i915#1542<https://gitlab.freedesktop.org/drm/intel/issues/1542>)
* igt@sysfs_clients@recycle:
* shard-glk: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-glk5/igt@sysfs_clients@recycle.html> -> FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-glk7/igt@sysfs_clients@recycle.html> ([i915#3028])
Possible fixes
* igt@gem_ctx_isolation@preservation-s3@bcs0:
* shard-skl: INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl1/igt@gem_ctx_isolation@preservation-s3@bcs0.html> (i915#198<https://gitlab.freedesktop.org/drm/intel/issues/198>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl8/igt@gem_ctx_isolation@preservation-s3@bcs0.html> +1 similar issue
* igt@gem_eio@unwedge-stress:
* shard-tglb: TIMEOUT<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb7/igt@gem_eio@unwedge-stress.html> (i915#1037<https://gitlab.freedesktop.org/drm/intel/issues/1037> / [i915#3063]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb2/igt@gem_eio@unwedge-stress.html>
* igt@gem_exec_fair@basic-flow@rcs0:
* shard-tglb: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb5/igt@gem_exec_fair@basic-flow@rcs0.html> ([i915#2842]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html>
* igt@gem_exec_fair@basic-pace@vcs0:
* shard-glk: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-glk2/igt@gem_exec_fair@basic-pace@vcs0.html> ([i915#2842]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-glk6/igt@gem_exec_fair@basic-pace@vcs0.html> +1 similar issue
* igt@gem_exec_fair@basic-throttle@rcs0:
* shard-iclb: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html> ([i915#2849]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html>
* igt@gem_exec_reloc@basic-many-active@rcs0:
* shard-apl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl1/igt@gem_exec_reloc@basic-many-active@rcs0.html> (i915#2389<https://gitlab.freedesktop.org/drm/intel/issues/2389>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl4/igt@gem_exec_reloc@basic-many-active@rcs0.html>
* shard-glk: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-glk4/igt@gem_exec_reloc@basic-many-active@rcs0.html> (i915#2389<https://gitlab.freedesktop.org/drm/intel/issues/2389>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-glk3/igt@gem_exec_reloc@basic-many-active@rcs0.html>
* igt@gem_exec_schedule@u-fairslice@rcs0:
* shard-skl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl4/igt@gem_exec_schedule@u-fairslice@rcs0.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610> / [i915#2803]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl4/igt@gem_exec_schedule@u-fairslice@rcs0.html>
* igt@gem_exec_schedule@u-fairslice@vcs0:
* shard-apl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl1/igt@gem_exec_schedule@u-fairslice@vcs0.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl4/igt@gem_exec_schedule@u-fairslice@vcs0.html>
* igt@gem_exec_schedule@u-fairslice@vecs0:
* shard-tglb: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb3/igt@gem_exec_schedule@u-fairslice@vecs0.html> ([i915#2803]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@gem_exec_schedule@u-fairslice@vecs0.html>
* igt@i915_pm_rc6_residency@rc6-fence:
* shard-hsw: WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-hsw1/igt@i915_pm_rc6_residency@rc6-fence.html> (i915#1519<https://gitlab.freedesktop.org/drm/intel/issues/1519>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-hsw6/igt@i915_pm_rc6_residency@rc6-fence.html>
* igt@i915_suspend@fence-restore-tiled2untiled:
* shard-apl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl4/igt@i915_suspend@fence-restore-tiled2untiled.html> (i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl7/igt@i915_suspend@fence-restore-tiled2untiled.html> +2 similar issues
* igt@kms_async_flips@alternate-sync-async-flip:
* shard-skl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html> (i915#2521<https://gitlab.freedesktop.org/drm/intel/issues/2521>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl7/igt@kms_async_flips@alternate-sync-async-flip.html>
* igt@kms_cursor_crc@pipe-b-cursor-128x128-random:
* shard-skl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl2/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html> ([i915#54]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-128x128-random.html> +8 similar issues
* igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
* shard-skl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html> (i915#2346<https://gitlab.freedesktop.org/drm/intel/issues/2346>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html>
* igt@kms_hdr@bpc-switch-suspend:
* shard-skl: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl8/igt@kms_hdr@bpc-switch-suspend.html> (i915#1188<https://gitlab.freedesktop.org/drm/intel/issues/1188>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html> +1 similar issue
* igt@kms_psr@psr2_primary_page_flip:
* shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb1/igt@kms_psr@psr2_primary_page_flip.html> (fdo#109441<https://bugs.freedesktop.org/show_bug.cgi?id=109441>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html> +2 similar issues
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
* shard-apl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html> (i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180> / [i915#295]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html>
* igt@kms_vblank@pipe-b-accuracy-idle:
* shard-skl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl4/igt@kms_vblank@pipe-b-accuracy-idle.html> (i915#1982<https://gitlab.freedesktop.org/drm/intel/issues/1982>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl1/igt@kms_vblank@pipe-b-accuracy-idle.html>
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
* shard-kbl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-kbl6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html> (i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-kbl2/igt@kms_vblank@pipe-b-ts-continuation-suspend.html>
* igt@sysfs_clients@recycle:
* shard-tglb: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb2/igt@sysfs_clients@recycle.html> ([i915#3028]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb3/igt@sysfs_clients@recycle.html>
* {igt@sysfs_clients@recycle-many}:
* shard-iclb: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb1/igt@sysfs_clients@recycle-many.html> ([i915#3028]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb3/igt@sysfs_clients@recycle-many.html>
* shard-hsw: FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-hsw8/igt@sysfs_clients@recycle-many.html> ([i915#3028]) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-hsw8/igt@sysfs_clients@recycle-many.html>
Warnings
* igt@gem_exec_balancer@hang:
* shard-iclb: INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb4/igt@gem_exec_balancer@hang.html> (i915#1895<https://gitlab.freedesktop.org/drm/intel/issues/1895> / i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / [i915#3031]) -> INCOMPLETE<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb4/igt@gem_exec_balancer@hang.html> (i915#1895<https://gitlab.freedesktop.org/drm/intel/issues/1895> / i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295>)
* igt@i915_pm_dc@dc3co-vpb-simulation:
* shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html> ([i915#588]) -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb1/igt@i915_pm_dc@dc3co-vpb-simulation.html> ([i915#658])
* igt@i915_selftest@live@gt_pm:
* shard-tglb: DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb2/igt@i915_selftest@live@gt_pm.html> (i915#1759<https://gitlab.freedesktop.org/drm/intel/issues/1759> / i915#2291<https://gitlab.freedesktop.org/drm/intel/issues/2291>) -> DMESG-FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb1/igt@i915_selftest@live@gt_pm.html> (i915#2291<https://gitlab.freedesktop.org/drm/intel/issues/2291>)
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
* shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html> ([i915#2920]) -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html> ([i915#658]) +1 similar issue
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3:
* shard-iclb: SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html> ([i915#658]) -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html> ([i915#2920]) +2 similar issues
* igt@runner@aborted:
* shard-iclb: (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb5/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-iclb3/igt@runner@aborted.html>) (i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / [i915#2724] / [i915#3002]) -> (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-iclb4/igt@runner@aborted.html>) (i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / i915#2426<https://gitlab.freedesktop.org/drm/intel/issues/2426> / [i915#2724] / [i915#3002])
* shard-apl: (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl4/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-apl2/igt@runner@aborted.html>) (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610> / i915#1814<https://gitlab.freedesktop.org/drm/intel/issues/1814> / i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / i915#2426<https://gitlab.freedesktop.org/drm/intel/issues/2426> / [i915#3002]) -> (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-apl6/igt@runner@aborted.html>) (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#1814<https://gitlab.freedesktop.org/drm/intel/issues/1814> / i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / [i915#3002])
* shard-tglb: (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-tglb1/igt@runner@aborted.html>) (i915#1764<https://gitlab.freedesktop.org/drm/intel/issues/1764> / i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / i915#2426<https://gitlab.freedesktop.org/drm/intel/issues/2426> / i915#2667<https://gitlab.freedesktop.org/drm/i> / [i915#2803] / [i915#3002]) -> (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-tglb5/igt@runner@aborted.html>) (i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / i915#2667<https://gitlab.freedesktop.org/drm/i> / [i915#3002])
* shard-skl: (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl4/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl4/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl5/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl5/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9771/shard-skl4/igt@runner@aborted.html>) (i915#1814<https://gitlab.freedesktop.org/drm/intel/issues/1814> / i915#2029<https://gitlab.freedesktop.org/drm/intel/issues/2029> / i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / i915#2426<https://gitlab.freedesktop.org/drm/intel/issues/2426> / [i915#3002]) -> (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19672/shard-skl9/igt@runner@aborted.html>) (i915#2295<https://gitlab.freedesktop.org/drm/intel/issues/2295> / [i915#3002])
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 2d6906f6995f..7631e080349d 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -1585,7 +1585,9 @@ hsw_set_signal_levels(struct intel_dp *intel_dp, static u32 icl_dpclka_cfgcr0_clk_off(struct drm_i915_private *dev_priv, enum phy phy) { - if (IS_ROCKETLAKE(dev_priv)) { + if (IS_ALDERLAKE_S(dev_priv)) { + return ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy); + } else if (IS_ROCKETLAKE(dev_priv)) { return RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); } else if (intel_phy_is_combo(dev_priv, phy)) { return ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 224ad897af34..7c69b50ccc5c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -10416,6 +10416,18 @@ enum skl_power_gate { ADLS_DPCLKA_DDIJ_SEL_MASK, \ ADLS_DPCLKA_DDIK_SEL_MASK) +#define _ADLS_DPCLKA_DDIA_CLK_OFF REG_BIT(10) +#define _ADLS_DPCLKA_DDIB_CLK_OFF REG_BIT(11) +#define _ADLS_DPCLKA_DDII_CLK_OFF REG_BIT(24) +#define _ADLS_DPCLKA_DDIJ_CLK_OFF REG_BIT(4) +#define _ADLS_DPCLKA_DDIK_CLK_OFF REG_BIT(5) +#define ADLS_DPCLKA_CFGCR_DDI_CLK_OFF(phy) _PICK((phy), \ + _ADLS_DPCLKA_DDIA_CLK_OFF, \ + _ADLS_DPCLKA_DDIB_CLK_OFF, \ + _ADLS_DPCLKA_DDII_CLK_OFF, \ + _ADLS_DPCLKA_DDIJ_CLK_OFF, \ + _ADLS_DPCLKA_DDIK_CLK_OFF) + /* CNL PLL */ #define DPLL0_ENABLE 0x46010 #define DPLL1_ENABLE 0x46014
The cfgcr0/1_clk_off mapping is wrong for adl-s what could cause the wrong clock being disabled and leaving a not needed clock running consuming more power than needed. Bspec: 50287 Bspec: 53812 Bspec: 53723 Fixes: d6d2bc996e45 ("drm/i915/adl_s: Configure Port clock registers for ADL-S") Cc: Aditya Swarup <aditya.swarup@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- drivers/gpu/drm/i915/i915_reg.h | 12 ++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-)