diff mbox series

[v2] drm/i915/display: Not to try to re-enable PSR after being raised an irq aux error

Message ID 20210317212632.2211971-1-gwan-gyeong.mun@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2] drm/i915/display: Not to try to re-enable PSR after being raised an irq aux error | expand

Commit Message

Gwan-gyeong Mun March 17, 2021, 9:26 p.m. UTC
If an irq aux error happens, it does not need to wait for PSR "IDLE state"
for re-enabling PSR. And it should not try to re-enable PSR.

The PSR interrupt handler sets irq_aux_error when the PSR error happens.
And it schedules the inter_psr_work(). but the current intel_psr_work() can
be scheduled by another PSR internal routine.
Therefore, we should not re-enable PSR after handing irq_aux_error in
intel_psr_work().

v2: Address Jose's review comment.
 - Handling the closing function in the check routine of irq_aux_error.
 - Add a detailed commit message for the scenario.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Souza, Jose March 22, 2021, 1:40 p.m. UTC | #1
On Wed, 2021-03-17 at 23:26 +0200, Gwan-gyeong Mun wrote:
> If an irq aux error happens, it does not need to wait for PSR "IDLE state"
> for re-enabling PSR. And it should not try to re-enable PSR.
> 
> The PSR interrupt handler sets irq_aux_error when the PSR error happens.
> And it schedules the inter_psr_work(). but the current intel_psr_work() can
> be scheduled by another PSR internal routine.
> Therefore, we should not re-enable PSR after handing irq_aux_error in
> intel_psr_work().
> 
> v2: Address Jose's review comment.
>  - Handling the closing function in the check routine of irq_aux_error.
>  - Add a detailed commit message for the scenario.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index cd434285e3b7..aba15846e78e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1683,8 +1683,10 @@ static void intel_psr_work(struct work_struct *work)
>  	if (!intel_dp->psr.enabled)
>  		goto unlock;
>  
> 
> 
> 
> -	if (READ_ONCE(intel_dp->psr.irq_aux_error))
> +	if (READ_ONCE(intel_dp->psr.irq_aux_error)) {
>  		intel_psr_handle_irq(intel_dp);
> +		goto unlock;
> +	}
>  
> 
> 
> 
>  	/*
>  	 * We have to make sure PSR is ready for re-enable
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index cd434285e3b7..aba15846e78e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1683,8 +1683,10 @@  static void intel_psr_work(struct work_struct *work)
 	if (!intel_dp->psr.enabled)
 		goto unlock;
 
-	if (READ_ONCE(intel_dp->psr.irq_aux_error))
+	if (READ_ONCE(intel_dp->psr.irq_aux_error)) {
 		intel_psr_handle_irq(intel_dp);
+		goto unlock;
+	}
 
 	/*
 	 * We have to make sure PSR is ready for re-enable