| Message ID | 20210408204917.254272-2-jose.souza@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] drm/i915/display: Implement Wa_14013723622 | expand |
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Tested-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> On Thu, 2021-04-08 at 13:49 -0700, José Roberto de Souza wrote: > This reverts commit 71c1a4998320962f7b8362b2c5ee36610d49e8fb. > > The proper fix is Wa_14013723622, so now we can revert this WA and > get back some power savings. > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 16 +--------------- > 1 file changed, 1 insertion(+), 15 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c > b/drivers/gpu/drm/i915/display/intel_psr.c > index 32d3d56259c2..6a61fe42686e 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1161,21 +1161,7 @@ static void psr_force_hw_tracking_exit(struct > intel_dp *intel_dp) > { > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); > > - if (IS_TIGERLAKE(dev_priv)) > - /* > - * Writes to CURSURFLIVE in TGL are causing IOMMU > errors and > - * visual glitches that are often reproduced when > executing > - * CPU intensive workloads while a eDP 4K panel is > attached. > - * > - * Manually exiting PSR causes the frontbuffer to be > updated > - * without glitches and the IOMMU errors are also gone > but > - * this comes at the cost of less time with PSR active. > - * > - * So using this workaround until this issue is root > caused > - * and a better fix is found. > - */ > - intel_psr_exit(intel_dp); > - else if (DISPLAY_VER(dev_priv) >= 9) > + if (DISPLAY_VER(dev_priv) >= 9) > /* > * Display WA #0884: skl+ > * This documented WA for bxt can be safely applied
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 32d3d56259c2..6a61fe42686e 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1161,21 +1161,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - if (IS_TIGERLAKE(dev_priv)) - /* - * Writes to CURSURFLIVE in TGL are causing IOMMU errors and - * visual glitches that are often reproduced when executing - * CPU intensive workloads while a eDP 4K panel is attached. - * - * Manually exiting PSR causes the frontbuffer to be updated - * without glitches and the IOMMU errors are also gone but - * this comes at the cost of less time with PSR active. - * - * So using this workaround until this issue is root caused - * and a better fix is found. - */ - intel_psr_exit(intel_dp); - else if (DISPLAY_VER(dev_priv) >= 9) + if (DISPLAY_VER(dev_priv) >= 9) /* * Display WA #0884: skl+ * This documented WA for bxt can be safely applied
This reverts commit 71c1a4998320962f7b8362b2c5ee36610d49e8fb. The proper fix is Wa_14013723622, so now we can revert this WA and get back some power savings. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-)