From patchwork Mon May 17 19:50:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Srivatsa, Anusha" X-Patchwork-Id: 12262999 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4F29C433B4 for ; Mon, 17 May 2021 19:50:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 69C3261285 for ; Mon, 17 May 2021 19:50:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 69C3261285 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 42DB76EA76; Mon, 17 May 2021 19:50:24 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 720556EA73 for ; Mon, 17 May 2021 19:50:20 +0000 (UTC) IronPort-SDR: PIsa8mXTTHEGhDyMGZyt66Ffi53auHy7I7ahY0gD7EsdNb1eEzqToBVQMgwTD/38mQYcDwvdEA WPRfaQpfdz2Q== X-IronPort-AV: E=McAfee;i="6200,9189,9987"; a="286081489" X-IronPort-AV: E=Sophos;i="5.82,307,1613462400"; d="scan'208";a="286081489" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 May 2021 12:50:18 -0700 IronPort-SDR: j9TY3Kmuw/Q4VyKfbSR6vDvjlMWq8l21vSqnECkTQ440wF9+iCtzvmKk6FFLYvQbEdmvEOtAZp y7n9y/MwGl1g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,307,1613462400"; d="scan'208";a="541445446" Received: from anushasr-mobl6.jf.intel.com ([10.165.21.155]) by fmsmga001.fm.intel.com with ESMTP; 17 May 2021 12:50:18 -0700 From: Anusha Srivatsa To: intel-gfx@lists.freedesktop.org Date: Mon, 17 May 2021 12:50:12 -0700 Message-Id: <20210517195015.27983-3-anusha.srivatsa@intel.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20210517195015.27983-1-anusha.srivatsa@intel.com> References: <20210517195015.27983-1-anusha.srivatsa@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/5] drm/i915/dmc: s/HAS_CSR/HAS_DMC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" No functional change. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_csr.c | 12 ++++++------ drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- drivers/gpu/drm/i915/i915_pci.c | 4 ++-- drivers/gpu/drm/i915/intel_device_info.c | 2 +- drivers/gpu/drm/i915/intel_device_info.h | 2 +- 7 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_csr.c b/drivers/gpu/drm/i915/display/intel_csr.c index a22339ebdffd..5ed286dc6720 100644 --- a/drivers/gpu/drm/i915/display/intel_csr.c +++ b/drivers/gpu/drm/i915/display/intel_csr.c @@ -315,9 +315,9 @@ void intel_csr_load_program(struct drm_i915_private *dev_priv) u32 *payload = dev_priv->dmc.dmc_payload; u32 i, fw_size; - if (!HAS_CSR(dev_priv)) { + if (!HAS_DMC(dev_priv)) { drm_err(&dev_priv->drm, - "No CSR support available for this platform\n"); + "No DMC support available for this platform\n"); return; } @@ -686,7 +686,7 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv) INIT_WORK(&dev_priv->dmc.work, csr_load_work_fn); - if (!HAS_CSR(dev_priv)) + if (!HAS_DMC(dev_priv)) return; /* @@ -776,7 +776,7 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv) */ void intel_csr_ucode_suspend(struct drm_i915_private *dev_priv) { - if (!HAS_CSR(dev_priv)) + if (!HAS_DMC(dev_priv)) return; flush_work(&dev_priv->dmc.work); @@ -795,7 +795,7 @@ void intel_csr_ucode_suspend(struct drm_i915_private *dev_priv) */ void intel_csr_ucode_resume(struct drm_i915_private *dev_priv) { - if (!HAS_CSR(dev_priv)) + if (!HAS_DMC(dev_priv)) return; /* @@ -815,7 +815,7 @@ void intel_csr_ucode_resume(struct drm_i915_private *dev_priv) */ void intel_csr_ucode_fini(struct drm_i915_private *dev_priv) { - if (!HAS_CSR(dev_priv)) + if (!HAS_DMC(dev_priv)) return; intel_csr_ucode_suspend(dev_priv); diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index a875f3c9b358..6cd7f8c1724f 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -535,7 +535,7 @@ static int i915_dmc_info(struct seq_file *m, void *unused) struct intel_dmc *dmc; i915_reg_t dc5_reg, dc6_reg = {}; - if (!HAS_CSR(dev_priv)) + if (!HAS_DMC(dev_priv)) return -ENODEV; dmc = &dev_priv->dmc; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ef7f0fa2431c..61c213380197 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1663,7 +1663,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_RPS(dev_priv) (INTEL_INFO(dev_priv)->has_rps) -#define HAS_CSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_csr) +#define HAS_DMC(dev_priv) (INTEL_INFO(dev_priv)->display.has_dmc) #define HAS_MSO(i915) (INTEL_GEN(i915) >= 12) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 03d1221de13b..06828ff90ccf 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -788,7 +788,7 @@ static void __err_print_to_sgl(struct drm_i915_error_state_buf *m, err_printf(m, "IOMMU enabled?: %d\n", error->iommu); - if (HAS_CSR(m->i915)) { + if (HAS_DMC(m->i915)) { struct intel_dmc *dmc = &m->i915->dmc; err_printf(m, "DMC loaded: %s\n", diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 574881c0e339..97c98f4fb265 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -643,7 +643,7 @@ static const struct intel_device_info chv_info = { GEN8_FEATURES, \ GEN(9), \ GEN9_DEFAULT_PAGE_SIZES, \ - .display.has_csr = 1, \ + .display.has_dmc = 1, \ .has_gt_uc = 1, \ .display.has_hdcp = 1, \ .display.has_ipc = 1, \ @@ -698,7 +698,7 @@ static const struct intel_device_info skl_gt4_info = { .display.has_psr = 1, \ .display.has_psr_hw_tracking = 1, \ .has_runtime_pm = 1, \ - .display.has_csr = 1, \ + .display.has_dmc = 1, \ .has_rc6 = 1, \ .has_rps = true, \ .display.has_dp_mst = 1, \ diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 8cb58a238c68..e16599b67b83 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -353,7 +353,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv) info->display.has_fbc = 0; if (INTEL_GEN(dev_priv) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE)) - info->display.has_csr = 0; + info->display.has_dmc = 0; if (INTEL_GEN(dev_priv) >= 10 && (dfsm & CNL_DFSM_DISPLAY_DSC_DISABLE)) diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index e98b36959736..1390fad5ec06 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -141,7 +141,7 @@ enum intel_ppgtt_type { #define DEV_INFO_DISPLAY_FOR_EACH_FLAG(func) \ /* Keep in alphabetical order */ \ func(cursor_needs_physical); \ - func(has_csr); \ + func(has_dmc); \ func(has_ddi); \ func(has_dp_mst); \ func(has_dsb); \