From patchwork Wed May 19 07:43:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 12266537 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E281EC43460 for ; Wed, 19 May 2021 07:43:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ABC5D61364 for ; Wed, 19 May 2021 07:43:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ABC5D61364 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ffwll.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CD54B6E21D; Wed, 19 May 2021 07:43:35 +0000 (UTC) Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1301F6E0FB for ; Wed, 19 May 2021 07:43:31 +0000 (UTC) Received: by mail-wr1-x435.google.com with SMTP id c14so11095570wrx.3 for ; Wed, 19 May 2021 00:43:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=3DkNIkydloyBNXsM4DUT+1wB5zlc/1I1RiMPxasZ1o4=; b=QT3TR7+gcB5ZgeHsAAYGoTlaoRivIDyZnyi7Hu12D0du6f3tXVnV1W6nqTa4oZiXcq DYmRc7GiJKdH/XmW9LVzEDOzXa6Qrp10N2mj+75vFcfxz+nvh8H4Q3rlAx7oEBfKVV3s +y2Vykne1PrBLl+PVpvylkhdtEzKy/u6tnZho= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=3DkNIkydloyBNXsM4DUT+1wB5zlc/1I1RiMPxasZ1o4=; b=VB+lFEA8hGKlZvxvYtqhxUtGiUZYpKEVazJU/6ELnM/vkOfsc8RyWGvF+cOdtvlB45 wXUKqp5f6xFVzNInw4/kIUT+xIcqBYHdv43EB3eSxm+ou8z16zrZqUT0wE1WxIG7tLsE yq3FATKAihy0GxIj+0BnMygfO1iyVuYoANexL1ZS7szC1ZDP/ICCHqYdfoujAnmnMc5W x7de42+gVMehijuVrH894re0j5Hzt6Pv7oQze9ykLBxSkASkeKF4dy6UhjSy1sRfKSb4 s6CX9zbS9jj7SnjG16TDO3eyAOregf0tHkEtrhLjYY31jGE7mu/4mYG2EVN5XRJiQyVR 9q+Q== X-Gm-Message-State: AOAM532PXZcB2+aRjhACUzxEuM0ZQNqvvsXCrGkdLgoI+8+YnHqL8l5y LIgDCWouUl/AVDP326a83/mE+w== X-Google-Smtp-Source: ABdhPJxY/s/pbrtEVXeB0LgwX2qCPUKkV8QxADPiaZ/KyvvaHb6Ub3VbrNxEzEfshwI5F4OAYx8VSQ== X-Received: by 2002:a5d:650b:: with SMTP id x11mr12601721wru.186.1621410210754; Wed, 19 May 2021 00:43:30 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:57f4:0:efd0:b9e5:5ae6:c2fa]) by smtp.gmail.com with ESMTPSA id h13sm21189986wml.26.2021.05.19.00.43.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 May 2021 00:43:30 -0700 (PDT) From: Daniel Vetter To: DRI Development , Intel Graphics Development Date: Wed, 19 May 2021 09:43:22 +0200 Message-Id: <20210519074323.665872-1-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/2] drm/i915/cmdparser: No-op failed batches on all platforms X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Daniel Vetter , stable@vger.kernel.org, Jason Ekstrand , Daniel Vetter Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On gen9 for blt cmd parser we relied on the magic fence error propagation which: - doesn't work on gen7, because there's no scheduler with ringbuffers there yet - fence error propagation can be weaponized to attack other things, so not a good design idea Instead of magic, do the same thing on gen9 as on gen7. Kudos to Jason for figuring this out. Fixes: 9e31c1fe45d5 ("drm/i915: Propagate errors on awaiting already signaled fences") Cc: # v5.6+ Cc: Jason Ekstrand Cc: Marcin Slusarz Cc: Jon Bloomfield Relates: https://gitlab.freedesktop.org/drm/intel/-/issues/3080 Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_cmd_parser.c | 34 +++++++++++++------------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 5b4b2bd46e7c..2d3336ab7ba3 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -1509,6 +1509,12 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine, } } + /* Batch unsafe to execute with privileges, cancel! */ + if (ret) { + cmd = page_mask_bits(shadow->obj->mm.mapping); + *cmd = MI_BATCH_BUFFER_END; + } + if (trampoline) { /* * With the trampoline, the shadow is executed twice. @@ -1524,26 +1530,20 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine, */ *batch_end = MI_BATCH_BUFFER_END; - if (ret) { - /* Batch unsafe to execute with privileges, cancel! */ - cmd = page_mask_bits(shadow->obj->mm.mapping); - *cmd = MI_BATCH_BUFFER_END; + /* If batch is unsafe but valid, jump to the original */ + if (ret == -EACCES) { + unsigned int flags; - /* If batch is unsafe but valid, jump to the original */ - if (ret == -EACCES) { - unsigned int flags; + flags = MI_BATCH_NON_SECURE_I965; + if (IS_HASWELL(engine->i915)) + flags = MI_BATCH_NON_SECURE_HSW; - flags = MI_BATCH_NON_SECURE_I965; - if (IS_HASWELL(engine->i915)) - flags = MI_BATCH_NON_SECURE_HSW; + GEM_BUG_ON(!IS_GEN_RANGE(engine->i915, 6, 7)); + __gen6_emit_bb_start(batch_end, + batch_addr, + flags); - GEM_BUG_ON(!IS_GEN_RANGE(engine->i915, 6, 7)); - __gen6_emit_bb_start(batch_end, - batch_addr, - flags); - - ret = 0; /* allow execution */ - } + ret = 0; /* allow execution */ } }