From patchwork Wed May 26 16:37:30 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Daniel Vetter X-Patchwork-Id: 12282267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-21.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9BD9DC47088 for ; Wed, 26 May 2021 16:37:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A0ACC6124B for ; Wed, 26 May 2021 16:37:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A0ACC6124B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ffwll.ch Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 30E2E6E194; Wed, 26 May 2021 16:37:39 +0000 (UTC) Received: from mail-ed1-x536.google.com (mail-ed1-x536.google.com [IPv6:2a00:1450:4864:20::536]) by gabe.freedesktop.org (Postfix) with ESMTPS id D40A76E194 for ; Wed, 26 May 2021 16:37:37 +0000 (UTC) Received: by mail-ed1-x536.google.com with SMTP id df21so2316242edb.3 for ; Wed, 26 May 2021 09:37:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7j7ZufiiTOqzVpKZdemVCOGwdsjbZKVtKpD5Om67Ua8=; b=Ww7HhkJb3QLyvOFvYPcOwG8HpIgTuHowg3wFIs5RBvC5UjILC9xJ+2rXietplVbID4 dfYTk0Cwnm9M2CIxasOzgxHhmEZP218CbSFRuSNUPXGCr2i1RotdaNu/52rN6j8zJa59 zKk2WROp+Kne4nIRl0HcDI7ABIPu4VOCMSOfs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=7j7ZufiiTOqzVpKZdemVCOGwdsjbZKVtKpD5Om67Ua8=; b=aQTF9H4Sst3HyDyZ63YD5cAVwPtHRGhfAtGAr8Ii3KR34NXf6jzeBh6Jd64SOO+TbC DWVLyAxAjYfcTjy2XBY9XYTewWjpFGgmI0DwO4vN/ugvb2l8BFl0gzddSPHNi1LWDpKH fVjas6My5QjyIY6K5K4Q9PHlGJqPOeoGcpJik3kAm/yqRZWyLJb4Pb8MzbCB2C+Q375c A42t900CIp15SUGIAZTyC9M4EpSTAgLoLEmzTYZKnip1yWiWab2fURL+k5Yv8qrclDg4 bdwpa7ylAx6xiG5bxcyu8wkWl78mOwwwf1tdlvT7jyJfhPnc+OVyAmqaKOlcTR/YQPev 9Ebg== X-Gm-Message-State: AOAM532Fnt47/didOQtArqn5e4qDgrYmRjR6K6jqXoSCzYbR42V5nwmh E6fWEM4KCcwHnquSCyrO8f5ZOmiXRQFjmg== X-Google-Smtp-Source: ABdhPJz9MXWowukPtGUGiDeQDRFv+ZlDAUYjAp4oW4QmS2DyWYMbPfQwy5K/oPLKfQzEmr7LzRnJ0w== X-Received: by 2002:aa7:cf19:: with SMTP id a25mr26117084edy.336.1622047056191; Wed, 26 May 2021 09:37:36 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:57f4:0:efd0:b9e5:5ae6:c2fa]) by smtp.gmail.com with ESMTPSA id l19sm12712038edv.17.2021.05.26.09.37.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 May 2021 09:37:35 -0700 (PDT) From: Daniel Vetter To: Intel Graphics Development Date: Wed, 26 May 2021 18:37:30 +0200 Message-Id: <20210526163730.3423181-1-daniel.vetter@ffwll.ch> X-Mailer: git-send-email 2.31.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Disable gpu relocations X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Thomas_Hellstr=C3=B6m?= , Daniel Vetter , DRI Development , Chris Wilson , Matthew Auld , Dave Airlie , Daniel Vetter Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Media userspace was the last userspace to still use them, and they converted now too: https://github.com/intel/media-driver/commit/144020c37770083974bedf59902b70b8f444c799 This means no reason anymore to make relocations faster than they've been for the first 9 years of gem. This code was added in commit 7dd4f6729f9243bd7046c6f04c107a456bda38eb Author: Chris Wilson Date: Fri Jun 16 15:05:24 2017 +0100 drm/i915: Async GPU relocation processing Furthermore there's pretty strong indications it's buggy, since the code to use it by default as the only option had to be reverted: commit ad5d95e4d538737ed3fa25493777decf264a3011 Author: Dave Airlie Date: Tue Sep 8 15:41:17 2020 +1000 Revert "drm/i915/gem: Async GPU relocations only" This code just disables gpu relocations, leaving the garbage collection for later patches and more importantly, much less confusing diff. Also given how much headaches this code has caused in the past, letting this soak for a bit seems justified. Cc: Jon Bloomfield Signed-off-by: Daniel Vetter Cc: Chris Wilson Cc: Maarten Lankhorst Cc: Joonas Lahtinen Cc: Daniel Vetter Cc: "Thomas Hellström" Cc: Matthew Auld Cc: Lionel Landwerlin Cc: Dave Airlie Cc: Jason Ekstrand Acked-by: Dave Airlie Reviewed-by: Maarten Lankhorst --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 43 ++++++++----------- 1 file changed, 18 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 297143511f99..31e904f79d0a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -1571,7 +1571,7 @@ static int __reloc_entry_gpu(struct i915_execbuffer *eb, return true; } -static int reloc_entry_gpu(struct i915_execbuffer *eb, +static int __maybe_unused reloc_entry_gpu(struct i915_execbuffer *eb, struct i915_vma *vma, u64 offset, u64 target_addr) @@ -1593,32 +1593,25 @@ relocate_entry(struct i915_vma *vma, { u64 target_addr = relocation_target(reloc, target); u64 offset = reloc->offset; - int reloc_gpu = reloc_entry_gpu(eb, vma, offset, target_addr); - - if (reloc_gpu < 0) - return reloc_gpu; - - if (!reloc_gpu) { - bool wide = eb->reloc_cache.use_64bit_reloc; - void *vaddr; + bool wide = eb->reloc_cache.use_64bit_reloc; + void *vaddr; repeat: - vaddr = reloc_vaddr(vma->obj, eb, - offset >> PAGE_SHIFT); - if (IS_ERR(vaddr)) - return PTR_ERR(vaddr); - - GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32))); - clflush_write32(vaddr + offset_in_page(offset), - lower_32_bits(target_addr), - eb->reloc_cache.vaddr); - - if (wide) { - offset += sizeof(u32); - target_addr >>= 32; - wide = false; - goto repeat; - } + vaddr = reloc_vaddr(vma->obj, eb, + offset >> PAGE_SHIFT); + if (IS_ERR(vaddr)) + return PTR_ERR(vaddr); + + GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32))); + clflush_write32(vaddr + offset_in_page(offset), + lower_32_bits(target_addr), + eb->reloc_cache.vaddr); + + if (wide) { + offset += sizeof(u32); + target_addr >>= 32; + wide = false; + goto repeat; } return target->node.start | UPDATE;