From patchwork Wed Jun 2 17:07:16 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thomas Hellstrom X-Patchwork-Id: 12295427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35F52C47083 for ; Wed, 2 Jun 2021 17:08:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0B04961CA8 for ; Wed, 2 Jun 2021 17:08:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0B04961CA8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D4DF6EE0C; Wed, 2 Jun 2021 17:08:41 +0000 (UTC) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id CA26B6EDD4; Wed, 2 Jun 2021 17:08:37 +0000 (UTC) IronPort-SDR: ef3tKBVlIFVov8bBW3L9laldWJviRAg0DWbnhZBHoV7MWa3/WsBX0DqNWFzuXpxs7dPumqbq3C xqMMIHPh4jdw== X-IronPort-AV: E=McAfee;i="6200,9189,10003"; a="225133309" X-IronPort-AV: E=Sophos;i="5.83,242,1616482800"; d="scan'208";a="225133309" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2021 10:07:47 -0700 IronPort-SDR: wNv1OZCyfIIUYGdKrw1RPGOErYKVVWDfdIfuCwCab+8JdSOw0BaAflRWFlCSKDF1LSr62NaWzI pR591XvmQNwA== X-IronPort-AV: E=Sophos;i="5.83,242,1616482800"; d="scan'208";a="550220271" Received: from ibanaga-mobl.ger.corp.intel.com (HELO thellst-mobl1.intel.com) ([10.249.254.50]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Jun 2021 10:07:45 -0700 From: =?utf-8?q?Thomas_Hellstr=C3=B6m?= To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Date: Wed, 2 Jun 2021 19:07:16 +0200 Message-Id: <20210602170716.280491-6-thomas.hellstrom@linux.intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210602170716.280491-1-thomas.hellstrom@linux.intel.com> References: <20210602170716.280491-1-thomas.hellstrom@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 5/5] drm/i915/ttm: Implement object migration X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Thomas_Hellstr=C3=B6m?= Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement object migration, needed primarily for dma-buf exports of objects currently residing in LMEM, until we land p2pdma. There are no users yet of this code. Signed-off-by: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_object.c | 100 ++++++++++++++++++ drivers/gpu/drm/i915/gem/i915_gem_object.h | 10 ++ .../gpu/drm/i915/gem/i915_gem_object_types.h | 7 ++ drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 51 ++++++++- 4 files changed, 164 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 07e8ff9a8aae..1589053ea99e 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -475,6 +475,106 @@ bool i915_gem_object_migratable(struct drm_i915_gem_object *obj) return obj->mm.n_placements > 1; } +bool i915_gem_object_can_migrate_to_region(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr, + unsigned int *placement_index) +{ + unsigned int i; + unsigned int num_allowed = obj->mm.n_placements; + + if (!i915_gem_object_evictable(obj)) + return false; + + if (num_allowed == 0 && mr != obj->mm.region) + return false; + + if (num_allowed == 1 && mr != obj->mm.placements[0]) + return false; + + for (i = 0; i < num_allowed; ++i) { + if (mr == obj->mm.placements[i]) { + if (placement_index) + *placement_index = i; + return true; + } + } + + return false; +} + +/** + * i915_gem_object_migrate_to_region_lazy - Lazily migrate an object + * @obj: The object to migrate. + * @mr: The region to migrate to. + * + * Check that @obj can migrate to @mr, and update all data necessary to + * make that happen on the next get_pages(). We sync and unbind gpu bindings + * and put pages. The word "lazy" means that the actual migration blit + * is not triggered by this function. + * + * Return: Zero on success, negative error code on failure. + */ +int i915_gem_object_migrate_to_region_lazy(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr) +{ + unsigned int index; + int ret; + + if (obj->mm.region == mr) + return 0; + + if (!i915_gem_object_can_migrate_to_region(obj, mr, &index)) + return -EINVAL; + + ret = i915_gem_object_unbind(obj, I915_GEM_OBJECT_UNBIND_ACTIVE); + if (ret) + return ret; + + ret = __i915_gem_object_put_pages(obj); + if (ret) + return ret; + + /* + * The next get_pages() will pick up the new desired placement + * and migrate. + */ + if (obj->mm.override_region) { + intel_memory_region_put(obj->mm.override_region); + obj->mm.override_region = NULL; + } + + if (index != 0) + obj->mm.override_region = + intel_memory_region_get(obj->mm.placements[index]); + + return 0; +} + +/** + * i915_gem_object_migrate_to_region - Migrate an object + * @obj: The object to migrate. + * @mr: The region to migrate to. + * + * Check that @obj can migrate to @mr, and migrate the object. + * The caller needs to check that the final region was the + * desired one since the object may have ended up elsewhere on + * lack of space in the desired region, and if there are other + * allowed placements. + * + * Return: Zero on success, negative error code on failure. + */ +int i915_gem_object_migrate_to_region(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr) +{ + int ret; + + ret = i915_gem_object_migrate_to_region_lazy(obj, mr); + if (ret) + return ret; + + return ____i915_gem_object_get_pages(obj); +} + /** * i915_gem_object_has_struct_page - Whether the object is page-backed * @obj: The object to query. diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h index 23e26f6b1db9..dfab5b080c54 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h @@ -592,6 +592,16 @@ bool i915_gem_object_migratable(struct drm_i915_gem_object *obj); bool i915_gem_object_validates_to_lmem(struct drm_i915_gem_object *obj); +bool i915_gem_object_can_migrate_to_region(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr, + unsigned int *placement_index); + +int i915_gem_object_migrate_to_region_lazy(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr); + +int i915_gem_object_migrate_to_region(struct drm_i915_gem_object *obj, + struct intel_memory_region *mr); + #ifdef CONFIG_MMU_NOTIFIER static inline bool i915_gem_object_is_userptr(struct drm_i915_gem_object *obj) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h index fb9ccc3f50e7..d645fa6f4c37 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h @@ -264,6 +264,13 @@ struct drm_i915_gem_object { */ struct intel_memory_region *region; + /** + * Override memory region for this object. Use to + * override the order of the placement list to migrate + * an object to the desired region. + */ + struct intel_memory_region *override_region; + /** * Memory manager node allocated for this object. */ diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index 42e89bf43708..c798470173e2 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -104,19 +104,45 @@ i915_ttm_placement_from_obj(const struct drm_i915_gem_object *obj, { unsigned int i; unsigned int num_allowed = obj->mm.n_placements; + struct intel_memory_region *requested_mr; + unsigned int swap_index = 0; placement->num_placement = 1; - i915_ttm_place_from_region(num_allowed ? obj->mm.placements[0] : - obj->mm.region, requested); - /* Cache this on object? */ + /* + * We migrate by setting the override region to something sensible. + * Warn if the override region is not in the allowed regions list + */ + if (obj->mm.override_region && !GEM_WARN_ON(!num_allowed)) { + requested_mr = obj->mm.override_region; + swap_index = num_allowed; + } else if (num_allowed) { + requested_mr = obj->mm.placements[0]; + } else { + requested_mr = obj->mm.region; + } + i915_ttm_place_from_region(requested_mr, requested); + + /* In the future we might want to cache the busy list on the object? */ placement->num_busy_placement = num_allowed; - for (i = 0; i < placement->num_busy_placement; ++i) + for (i = 0; i < placement->num_busy_placement; ++i) { i915_ttm_place_from_region(obj->mm.placements[i], busy + i); + if (requested_mr == obj->mm.placements[i]) + swap_index = i; + } + + /* Override region was not in placement list. */ + if (num_allowed && GEM_WARN_ON(swap_index == num_allowed)) { + swap_index = 0; + i915_ttm_place_from_region(obj->mm.placements[0], requested); + } if (num_allowed == 0) { *busy = *requested; placement->num_busy_placement = 1; + } else if (swap_index != 0) { + /* Put the override placement highest in the busy list */ + swap(busy[0], busy[swap_index]); } placement->placement = requested; @@ -246,6 +272,23 @@ static void i915_ttm_adjust_gem_after_move(struct drm_i915_gem_object *obj) struct drm_i915_private *i915 = to_i915(obj->base.dev); struct ttm_buffer_object *bo = i915_gem_to_ttm(obj); unsigned int cache_level; + unsigned int i; + + /* + * If object was moved to an allowable region, update the object + * region to consider it migrated. Note that if it's currently not + * in an allowable region, it's evicted and we don't update the + * object region. + */ + for (i = 0; i < obj->mm.n_placements; ++i) { + struct intel_memory_region *mr = obj->mm.placements[i]; + + if (intel_region_to_ttm_type(mr) == bo->mem.mem_type && + mr != obj->mm.region) { + intel_memory_region_put(obj->mm.region); + obj->mm.region = intel_memory_region_get(mr); + } + } obj->mem_flags &= ~(I915_BO_FLAG_STRUCT_PAGE | I915_BO_FLAG_IOMEM);