From patchwork Thu Jun 17 05:44:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Zbigniew_Kempczy=C5=84ski?= X-Patchwork-Id: 12326641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10819C2B9F4 for ; Thu, 17 Jun 2021 05:44:50 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 958BF60C3E for ; Thu, 17 Jun 2021 05:44:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 958BF60C3E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D07F89708; Thu, 17 Jun 2021 05:44:47 +0000 (UTC) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 431B289708 for ; Thu, 17 Jun 2021 05:44:46 +0000 (UTC) IronPort-SDR: H3PbiHscR+l6nMGNYx3cvvKK51OoFvgYrDt4vAWXTlXDmFpn5bYu8/qFMhW8fv+Vqmp5fwmrH3 /NyL1em0u1gg== X-IronPort-AV: E=McAfee;i="6200,9189,10017"; a="291939801" X-IronPort-AV: E=Sophos;i="5.83,278,1616482800"; d="scan'208";a="291939801" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2021 22:44:31 -0700 IronPort-SDR: 15VYB5/AOg8Ae3CY88Zka7zcxLqa0OhJq/Uq1EYh1/BF3nvSBEnm333UVluYBIU4pn6xQ7xVIU vIj/AKudq0nw== X-IronPort-AV: E=Sophos;i="5.83,278,1616482800"; d="scan'208";a="485169416" Received: from kmatusie-mobl.ger.corp.intel.com (HELO zkempczy-mobl2.ger.corp.intel.com) ([10.213.30.210]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2021 22:44:26 -0700 From: =?utf-8?q?Zbigniew_Kempczy=C5=84ski?= To: intel-gfx@lists.freedesktop.org Date: Thu, 17 Jun 2021 07:44:18 +0200 Message-Id: <20210617054418.6094-1-zbigniew.kempczynski@intel.com> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: Add relocation exceptions for two other platforms X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For topic/intel-for-CI branch only. We have established previously we stop using relocations starting from gen12 platforms with Tigerlake as an exception. We keep this statement but we want to enable relocations conditionally for Alderlake S+P under require_force_probe flag set. Keeping relocations under require_force_probe flag is interim solution until IGTs will be rewritten to use softpin. v2: - remove inline from function definition (Jani) - fix indentation v3: change to GRAPHICS_VER() (Zbigniew) v4: remove RKL from flag as it is already shipped (Rodrigo) v5: prepare patch to be used within topic/intel-for-CI branch only v6: change comment (Rodrigo) Signed-off-by: Zbigniew Kempczyński Cc: Dave Airlie Cc: Daniel Vetter Cc: Jason Ekstrand Cc: Rodrigo Vivi Acked-by: Dave Airlie Acked-by: Rodrigo Vivi --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 21 ++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 760c8aefea3a..8f15fa88cac6 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -491,16 +491,27 @@ eb_unreserve_vma(struct eb_vma *ev) ev->flags &= ~__EXEC_OBJECT_RESERVED; } +static bool platform_has_relocs_enabled(const struct i915_execbuffer *eb) +{ + /* + * Relocations are disallowed starting from gen12 with Tigerlake + * as an exception. To unblock CI, we are temporarily allowing it + * for Rocketlake and Alderlake. + */ + if (GRAPHICS_VER(eb->i915) < 12 || IS_TIGERLAKE(eb->i915) || + IS_ROCKETLAKE(eb->i915) || IS_ALDERLAKE_S(eb->i915) || + IS_ALDERLAKE_P(eb->i915)) + return true; + + return false; +} + static int eb_validate_vma(struct i915_execbuffer *eb, struct drm_i915_gem_exec_object2 *entry, struct i915_vma *vma) { - /* Relocations are disallowed for all platforms after TGL-LP. This - * also covers all platforms with local memory. - */ - if (entry->relocation_count && - GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915)) + if (entry->relocation_count && !platform_has_relocs_enabled(eb)) return -EINVAL; if (unlikely(entry->flags & eb->invalid_flags))