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Tue, 7 Sep 2021 07:26:10 +0000 (UTC) Received: from dreadlord-bne-redhat-com.bne.redhat.com (unknown [10.64.0.157]) by smtp.corp.redhat.com (Postfix) with ESMTP id 48E1960936; Tue, 7 Sep 2021 07:26:09 +0000 (UTC) From: Dave Airlie To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@linux.intel.com, Dave Airlie Date: Tue, 7 Sep 2021 17:25:33 +1000 Message-Id: <20210907072549.2962226-10-airlied@gmail.com> In-Reply-To: <20210907072549.2962226-1-airlied@gmail.com> References: <20210907072549.2962226-1-airlied@gmail.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=airlied@gmail.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: gmail.com Subject: [Intel-gfx] [PATCH 09/25] drm/i915/display: move drrs into display struct X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Dave Airlie Signed-off-by: Dave Airlie --- .../drm/i915/display/intel_display_debugfs.c | 2 +- drivers/gpu/drm/i915/display/intel_drrs.c | 32 +++++++++---------- drivers/gpu/drm/i915/display/intel_psr.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 2 +- 4 files changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index be0601606aa1..472cd21fc788 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -1234,7 +1234,7 @@ static void drrs_status_per_crtc(struct seq_file *m, struct intel_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(dev); - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; int vrefresh = 0; struct drm_connector *connector; struct drm_connector_list_iter conn_iter; diff --git a/drivers/gpu/drm/i915/display/intel_drrs.c b/drivers/gpu/drm/i915/display/intel_drrs.c index 670bcd50a56f..1de93b1654ee 100644 --- a/drivers/gpu/drm/i915/display/intel_drrs.c +++ b/drivers/gpu/drm/i915/display/intel_drrs.c @@ -69,7 +69,7 @@ intel_drrs_compute_config(struct intel_dp *intel_dp, return; if (!intel_connector->panel.downclock_mode || - dev_priv->drrs.type != SEAMLESS_DRRS_SUPPORT) + dev_priv->display->drrs.type != SEAMLESS_DRRS_SUPPORT) return; pipe_config->has_drrs = true; @@ -91,7 +91,7 @@ static void intel_drrs_set_state(struct drm_i915_private *dev_priv, const struct intel_crtc_state *crtc_state, int refresh_rate) { - struct intel_dp *intel_dp = dev_priv->drrs.dp; + struct intel_dp *intel_dp = dev_priv->display->drrs.dp; struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum drrs_refresh_rate_type index = DRRS_HIGH_RR; @@ -112,7 +112,7 @@ static void intel_drrs_set_state(struct drm_i915_private *dev_priv, return; } - if (dev_priv->drrs.type < SEAMLESS_DRRS_SUPPORT) { + if (dev_priv->display->drrs.type < SEAMLESS_DRRS_SUPPORT) { drm_dbg_kms(&dev_priv->drm, "Only Seamless DRRS supported.\n"); return; } @@ -121,7 +121,7 @@ static void intel_drrs_set_state(struct drm_i915_private *dev_priv, refresh_rate) index = DRRS_LOW_RR; - if (index == dev_priv->drrs.refresh_rate_type) { + if (index == dev_priv->display->drrs.refresh_rate_type) { drm_dbg_kms(&dev_priv->drm, "DRRS requested for previously set RR...ignoring\n"); return; @@ -165,7 +165,7 @@ static void intel_drrs_set_state(struct drm_i915_private *dev_priv, intel_de_write(dev_priv, reg, val); } - dev_priv->drrs.refresh_rate_type = index; + dev_priv->display->drrs.refresh_rate_type = index; drm_dbg_kms(&dev_priv->drm, "eDP Refresh Rate set to : %dHz\n", refresh_rate); @@ -176,8 +176,8 @@ intel_drrs_enable_locked(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - dev_priv->drrs.busy_frontbuffer_bits = 0; - dev_priv->drrs.dp = intel_dp; + dev_priv->display->drrs.busy_frontbuffer_bits = 0; + dev_priv->display->drrs.dp = intel_dp; } /** @@ -191,7 +191,7 @@ void intel_drrs_enable(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; if (!crtc_state->has_drrs) return; @@ -216,7 +216,7 @@ intel_drrs_disable_locked(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; if (drrs->refresh_rate_type == DRRS_LOW_RR) { int refresh; @@ -238,7 +238,7 @@ void intel_drrs_disable(struct intel_dp *intel_dp, const struct intel_crtc_state *old_crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; if (!old_crtc_state->has_drrs) return; @@ -269,7 +269,7 @@ intel_drrs_update(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; if (drrs->type != SEAMLESS_DRRS_SUPPORT) return; @@ -292,8 +292,8 @@ intel_drrs_update(struct intel_dp *intel_dp, static void intel_drrs_downclock_work(struct work_struct *work) { struct drm_i915_private *dev_priv = - container_of(work, typeof(*dev_priv), drrs.work.work); - struct i915_drrs *drrs = &dev_priv->drrs; + container_of(work, typeof(*dev_priv), _display.drrs.work.work); + struct i915_drrs *drrs = &dev_priv->display->drrs; struct intel_dp *intel_dp; mutex_lock(&drrs->mutex); @@ -335,7 +335,7 @@ static void intel_drrs_downclock_work(struct work_struct *work) void intel_drrs_invalidate(struct drm_i915_private *dev_priv, unsigned int frontbuffer_bits) { - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; struct intel_dp *intel_dp; struct drm_crtc *crtc; enum pipe pipe; @@ -382,7 +382,7 @@ void intel_drrs_invalidate(struct drm_i915_private *dev_priv, void intel_drrs_flush(struct drm_i915_private *dev_priv, unsigned int frontbuffer_bits) { - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; struct intel_dp *intel_dp; struct drm_crtc *crtc; enum pipe pipe; @@ -439,7 +439,7 @@ intel_drrs_init(struct intel_connector *connector, struct drm_display_mode *fixed_mode) { struct drm_i915_private *dev_priv = to_i915(connector->base.dev); - struct i915_drrs *drrs = &dev_priv->drrs; + struct i915_drrs *drrs = &dev_priv->display->drrs; struct drm_display_mode *downclock_mode = NULL; INIT_DELAYED_WORK(&drrs->work, intel_drrs_downclock_work); diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index e07b7ee169bd..2be2e83d636c 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1225,7 +1225,7 @@ void intel_psr_enable(struct intel_dp *intel_dp, if (!crtc_state->has_psr) return; - drm_WARN_ON(&dev_priv->drm, dev_priv->drrs.dp); + drm_WARN_ON(&dev_priv->drm, dev_priv->display->drrs.dp); mutex_lock(&intel_dp->psr.lock); intel_psr_enable_locked(intel_dp, crtc_state, conn_state); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 738bb87b1fb8..8daa5a24782f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -867,6 +867,7 @@ struct drm_i915_display { wait_queue_head_t gmbus_wait_queue; struct intel_dmc dmc; + struct i915_drrs drrs; }; struct drm_i915_private { @@ -942,7 +943,6 @@ struct drm_i915_private { struct i915_hotplug hotplug; struct intel_fbc fbc; - struct i915_drrs drrs; struct intel_opregion opregion; struct intel_vbt_data vbt;