| Message ID | 20210907113658.1351456-1-tejaskumarx.surendrakumar.upadhyay@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/display: Add HDR mode helper function | expand |
On Tue, Sep 07, 2021 at 05:06:58PM +0530, Tejas Upadhyay wrote: > Add helper function with returns if HDR mode in on > > Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Sorry for the lag. This kept slipping my mind. I fixed up the alignment a bit and pushed to drm-intel-next. Thanks. > --- > drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 1f447ba776c7..51008600a180 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -182,6 +182,12 @@ static void intel_update_czclk(struct drm_i915_private *dev_priv) > dev_priv->czclk_freq); > } > > +static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) > +{ > + return (crtc_state->active_planes & ~(icl_hdr_plane_mask() | > + BIT(PLANE_CURSOR))) == 0; > +} > + > /* WA Display #0827: Gen9:all */ > static void > skl_wa_827(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable) > @@ -5257,8 +5263,7 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state) > PIPEMISC_YUV420_MODE_FULL_BLEND; > > if (DISPLAY_VER(dev_priv) >= 11 && > - (crtc_state->active_planes & ~(icl_hdr_plane_mask() | > - BIT(PLANE_CURSOR))) == 0) > + is_hdr_mode(crtc_state)) > val |= PIPEMISC_HDR_MODE_PRECISION; > > if (DISPLAY_VER(dev_priv) >= 12) > -- > 2.31.1
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 1f447ba776c7..51008600a180 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -182,6 +182,12 @@ static void intel_update_czclk(struct drm_i915_private *dev_priv) dev_priv->czclk_freq); } +static bool is_hdr_mode(const struct intel_crtc_state *crtc_state) +{ + return (crtc_state->active_planes & ~(icl_hdr_plane_mask() | + BIT(PLANE_CURSOR))) == 0; +} + /* WA Display #0827: Gen9:all */ static void skl_wa_827(struct drm_i915_private *dev_priv, enum pipe pipe, bool enable) @@ -5257,8 +5263,7 @@ static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state) PIPEMISC_YUV420_MODE_FULL_BLEND; if (DISPLAY_VER(dev_priv) >= 11 && - (crtc_state->active_planes & ~(icl_hdr_plane_mask() | - BIT(PLANE_CURSOR))) == 0) + is_hdr_mode(crtc_state)) val |= PIPEMISC_HDR_MODE_PRECISION; if (DISPLAY_VER(dev_priv) >= 12)
Add helper function with returns if HDR mode in on Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)