diff mbox series

[v2] drm/i915/adlp: Extend PSR2 support in transcoder B

Message ID 20211027180545.55660-1-jose.souza@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2] drm/i915/adlp: Extend PSR2 support in transcoder B | expand

Commit Message

Souza, Jose Oct. 27, 2021, 6:05 p.m. UTC
PSR2 is supported in transcoder A and B on Alderlake-P.

v2:
- explicity checking for transcoder A and B to avoid invalid transcoder

BSpec: 49185
Reviewed-by: Jouni Högander <jouni.hogander@intel.com> # v1
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jouni Hogander <jouni.hogander@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Mika Kahola Oct. 28, 2021, 6:35 a.m. UTC | #1
> -----Original Message-----
> From: Souza, Jose <jose.souza@intel.com>
> Sent: Wednesday, October 27, 2021 9:06 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Hogander, Jouni <jouni.hogander@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Kahola, Mika <mika.kahola@intel.com>; Souza, Jose
> <jose.souza@intel.com>
> Subject: [PATCH v2] drm/i915/adlp: Extend PSR2 support in transcoder B
> 
> PSR2 is supported in transcoder A and B on Alderlake-P.
> 
> v2:
> - explicity checking for transcoder A and B to avoid invalid transcoder
> 
> BSpec: 49185
> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> # v1

Reviewed-by: Mika Kahola <mika.kahola@intel.com> # v2

> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: Jouni Hogander <jouni.hogander@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 8d08e3cf08c1f..33b50646b9c97 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -588,7 +588,9 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
> static bool  transcoder_has_psr2(struct drm_i915_private *dev_priv, enum
> transcoder trans)  {
> -	if (DISPLAY_VER(dev_priv) >= 12)
> +	if (IS_ALDERLAKE_P(dev_priv))
> +		return trans == TRANSCODER_A || trans == TRANSCODER_B;
> +	else if (DISPLAY_VER(dev_priv) >= 12)
>  		return trans == TRANSCODER_A;
>  	else
>  		return trans == TRANSCODER_EDP;
> --
> 2.33.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 8d08e3cf08c1f..33b50646b9c97 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -588,7 +588,9 @@  static void hsw_activate_psr2(struct intel_dp *intel_dp)
 static bool
 transcoder_has_psr2(struct drm_i915_private *dev_priv, enum transcoder trans)
 {
-	if (DISPLAY_VER(dev_priv) >= 12)
+	if (IS_ALDERLAKE_P(dev_priv))
+		return trans == TRANSCODER_A || trans == TRANSCODER_B;
+	else if (DISPLAY_VER(dev_priv) >= 12)
 		return trans == TRANSCODER_A;
 	else
 		return trans == TRANSCODER_EDP;