diff mbox series

drm/i915/display/dsc: Clamp the max DSC input BPP to connector's max bpp

Message ID 20211111230949.28590-1-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/display/dsc: Clamp the max DSC input BPP to connector's max bpp | expand

Commit Message

Navare, Manasi Nov. 11, 2021, 11:09 p.m. UTC
Pipe_bpp limits are decided by connectors max bpp as computed in
compute_sink_pipe_bpp() before computing link and DSC config.
Currently dsc_compute_config() sets the max input bpp only based
on DSC Input BPPs supported and max bpc requested for the connector
but does not clamp it based on connector's max bpp.
This patch fixes that.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Navare, Manasi Nov. 18, 2021, 10:47 p.m. UTC | #1
@Jani , @Ville, can you take a look at this, this was how the original DSC patches
clamped the max bpp, but with latest DSC changes looks like this is not
obeyed anymore and needs to be fixed.

Manasi

On Thu, Nov 11, 2021 at 03:09:49PM -0800, Manasi Navare wrote:
> Pipe_bpp limits are decided by connectors max bpp as computed in
> compute_sink_pipe_bpp() before computing link and DSC config.
> Currently dsc_compute_config() sets the max input bpp only based
> on DSC Input BPPs supported and max bpc requested for the connector
> but does not clamp it based on connector's max bpp.
> This patch fixes that.
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 45373c213d9e..82209d995969 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1400,6 +1400,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  		return -EINVAL;
>  
>  	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
> +	pipe_bpp = min(pipe_bpp, limits->max_bpp);
>  
>  	/* Min Input BPC for ICL+ is 8 */
>  	if (pipe_bpp < 8 * 3) {
> -- 
> 2.19.1
>
Jani Nikula Nov. 19, 2021, 9:37 a.m. UTC | #2
On Thu, 18 Nov 2021, "Navare, Manasi" <manasi.d.navare@intel.com> wrote:
> @Jani , @Ville, can you take a look at this, this was how the original DSC patches
> clamped the max bpp, but with latest DSC changes looks like this is not
> obeyed anymore and needs to be fixed.

When was this changed?

Fixes: ?

>
> Manasi
>
> On Thu, Nov 11, 2021 at 03:09:49PM -0800, Manasi Navare wrote:
>> Pipe_bpp limits are decided by connectors max bpp as computed in
>> compute_sink_pipe_bpp() before computing link and DSC config.
>> Currently dsc_compute_config() sets the max input bpp only based
>> on DSC Input BPPs supported and max bpc requested for the connector
>> but does not clamp it based on connector's max bpp.
>> This patch fixes that.
>> 
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
>> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 1 +
>>  1 file changed, 1 insertion(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 45373c213d9e..82209d995969 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1400,6 +1400,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>>  		return -EINVAL;
>>  
>>  	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
>> +	pipe_bpp = min(pipe_bpp, limits->max_bpp);
>>  
>>  	/* Min Input BPC for ICL+ is 8 */
>>  	if (pipe_bpp < 8 * 3) {
>> -- 
>> 2.19.1
>>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 45373c213d9e..82209d995969 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1400,6 +1400,7 @@  static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 		return -EINVAL;
 
 	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
+	pipe_bpp = min(pipe_bpp, limits->max_bpp);
 
 	/* Min Input BPC for ICL+ is 8 */
 	if (pipe_bpp < 8 * 3) {