Message ID | 20211119131348.725220-5-mika.kahola@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add support for CD clock squashing feature. | expand |
On Fri, Nov 19, 2021 at 03:13:47PM +0200, Mika Kahola wrote: > To calculate CD clock with squasher unit, we set CD clock ratio to fixed value of 34. > The CD clock value is read from CD clock squasher table. > > BSpec: 54034 > > v2: Read ratio from register (Ville) > Drop unnecessary local variable (Ville) > Get CD clock from the given table > v3: Calculate CD clock frequency based on waveform bit pattern (Ville) > [v4: vsyrjala: Actually do a proper blind readout from the hardware] > [v5: vsyrjala: Use has_cdclk_squasher()] > Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_cdclk.c | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c > index 560383e8c5b6..5fcb393079f7 100644 > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c > @@ -1466,6 +1466,7 @@ static void bxt_de_pll_readout(struct drm_i915_private *dev_priv, > static void bxt_get_cdclk(struct drm_i915_private *dev_priv, > struct intel_cdclk_config *cdclk_config) > { > + u32 squash_ctl = 0; > u32 divider; > int div; > > @@ -1503,7 +1504,21 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv, > return; > } > > - cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div); > + if (has_cdclk_squasher(dev_priv)) > + squash_ctl = intel_de_read(dev_priv, CDCLK_SQUASH_CTL); > + > + if (squash_ctl & CDCLK_SQUASH_ENABLE) { > + u16 waveform; > + int size; > + > + size = REG_FIELD_GET(CDCLK_SQUASH_WINDOW_SIZE_MASK, squash_ctl) + 1; > + waveform = REG_FIELD_GET(CDCLK_SQUASH_WAVEFORM_MASK, squash_ctl) >> (16 - size); > + > + cdclk_config->cdclk = DIV_ROUND_CLOSEST(hweight16(waveform) * > + cdclk_config->vco, size * div); > + } else { > + cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div); > + } > > out: > /* > -- > 2.27.0 >
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 560383e8c5b6..5fcb393079f7 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1466,6 +1466,7 @@ static void bxt_de_pll_readout(struct drm_i915_private *dev_priv, static void bxt_get_cdclk(struct drm_i915_private *dev_priv, struct intel_cdclk_config *cdclk_config) { + u32 squash_ctl = 0; u32 divider; int div; @@ -1503,7 +1504,21 @@ static void bxt_get_cdclk(struct drm_i915_private *dev_priv, return; } - cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div); + if (has_cdclk_squasher(dev_priv)) + squash_ctl = intel_de_read(dev_priv, CDCLK_SQUASH_CTL); + + if (squash_ctl & CDCLK_SQUASH_ENABLE) { + u16 waveform; + int size; + + size = REG_FIELD_GET(CDCLK_SQUASH_WINDOW_SIZE_MASK, squash_ctl) + 1; + waveform = REG_FIELD_GET(CDCLK_SQUASH_WAVEFORM_MASK, squash_ctl) >> (16 - size); + + cdclk_config->cdclk = DIV_ROUND_CLOSEST(hweight16(waveform) * + cdclk_config->vco, size * div); + } else { + cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_config->vco, div); + } out: /*