| Message ID | 20211217071356.12517-4-suraj.kandpal@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Adding writeback support for i915 | expand |
On Fri, 17 Dec 2021, "Kandpal, Suraj" <suraj.kandpal@intel.com> wrote: > From: suraj kandpal <suraj.kandpal@intel.com> > > Adding WD Types, WD transcoder to enum list and WD Transcoder offsets This should be part of the patch that uses them. BR, Jani. > > Signed-off-by: suraj kandpal <suraj.kandpal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.h | 6 ++++++ > drivers/gpu/drm/i915/display/intel_display_types.h | 1 + > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > 3 files changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h > index d425ee77aad7..76f999525d43 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -117,6 +117,8 @@ enum transcoder { > TRANSCODER_DSI_1, > TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */ > TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */ > + TRANSCODER_WD_0, > + TRANSCODER_WD_1, > > I915_MAX_TRANSCODERS > }; > @@ -138,6 +140,10 @@ static inline const char *transcoder_name(enum transcoder transcoder) > return "DSI A"; > case TRANSCODER_DSI_C: > return "DSI C"; > + case TRANSCODER_WD_0: > + return "WD 0"; > + case TRANSCODER_WD_1: > + return "WD 1"; > default: > return "<invalid>"; > } > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h > index 9413ebae15f5..f20086280d7e 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -69,6 +69,7 @@ enum intel_output_type { > INTEL_OUTPUT_DSI = 9, > INTEL_OUTPUT_DDI = 10, > INTEL_OUTPUT_DP_MST = 11, > + INTEL_OUTPUT_WD = 12, > }; > > enum hdmi_force_audio { > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index ef594df039db..b8e42c55ff87 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4431,6 +4431,8 @@ enum { > #define TRANSCODER_EDP_OFFSET 0x6f000 > #define TRANSCODER_DSI0_OFFSET 0x6b000 > #define TRANSCODER_DSI1_OFFSET 0x6b800 > +#define TRANSCODER_WD0_OFFSET 0x6e000 > +#define TRANSCODER_WD1_OFFSET 0x6e800 > > #define HTOTAL(trans) _MMIO_TRANS2(trans, _HTOTAL_A) > #define HBLANK(trans) _MMIO_TRANS2(trans, _HBLANK_A)
> > Adding WD Types, WD transcoder to enum list and WD Transcoder offsets > > This should be part of the patch that uses them. Got it will squash this patch with the one using the above Thanks, Suraj Kandpal > > BR, > Jani.
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index d425ee77aad7..76f999525d43 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -117,6 +117,8 @@ enum transcoder { TRANSCODER_DSI_1, TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */ TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */ + TRANSCODER_WD_0, + TRANSCODER_WD_1, I915_MAX_TRANSCODERS }; @@ -138,6 +140,10 @@ static inline const char *transcoder_name(enum transcoder transcoder) return "DSI A"; case TRANSCODER_DSI_C: return "DSI C"; + case TRANSCODER_WD_0: + return "WD 0"; + case TRANSCODER_WD_1: + return "WD 1"; default: return "<invalid>"; } diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 9413ebae15f5..f20086280d7e 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -69,6 +69,7 @@ enum intel_output_type { INTEL_OUTPUT_DSI = 9, INTEL_OUTPUT_DDI = 10, INTEL_OUTPUT_DP_MST = 11, + INTEL_OUTPUT_WD = 12, }; enum hdmi_force_audio { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ef594df039db..b8e42c55ff87 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4431,6 +4431,8 @@ enum { #define TRANSCODER_EDP_OFFSET 0x6f000 #define TRANSCODER_DSI0_OFFSET 0x6b000 #define TRANSCODER_DSI1_OFFSET 0x6b800 +#define TRANSCODER_WD0_OFFSET 0x6e000 +#define TRANSCODER_WD1_OFFSET 0x6e800 #define HTOTAL(trans) _MMIO_TRANS2(trans, _HTOTAL_A) #define HBLANK(trans) _MMIO_TRANS2(trans, _HBLANK_A)