diff mbox series

drm/i915: add more TMDS clock rate supported by HDMI driver

Message ID 20220301050141.12203-1-shawn.c.lee@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: add more TMDS clock rate supported by HDMI driver | expand

Commit Message

Lee, Shawn C March 1, 2022, 5:01 a.m. UTC
VBT 249 update to support more TMDS clock rate 3.00G, 3.40G
and 5.94G. Refer to this new definition to configure max
TMDS clock rate for HDMI driver.

BSpec: 20124

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 6 ++++++
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 3 +++
 2 files changed, 9 insertions(+)

Comments

Ville Syrjälä March 2, 2022, 2:50 p.m. UTC | #1
On Tue, Mar 01, 2022 at 01:01:41PM +0800, Lee Shawn C wrote:
> VBT 249 update to support more TMDS clock rate 3.00G, 3.40G
> and 5.94G. Refer to this new definition to configure max
> TMDS clock rate for HDMI driver.

The patch itself looks fine. The patch subject is pretty much
incomprehensible to me.

> 
> BSpec: 20124
> 
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_bios.c     | 6 ++++++
>  drivers/gpu/drm/i915/display/intel_vbt_defs.h | 3 +++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 40b5e7ed12c2..a559a1914588 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1955,6 +1955,12 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
>  		fallthrough;
>  	case HDMI_MAX_DATA_RATE_PLATFORM:
>  		return 0;
> +	case HDMI_MAX_DATA_RATE_594:
> +		return 594000;
> +	case HDMI_MAX_DATA_RATE_340:
> +		return 340000;
> +	case HDMI_MAX_DATA_RATE_300:
> +		return 300000;
>  	case HDMI_MAX_DATA_RATE_297:
>  		return 297000;
>  	case HDMI_MAX_DATA_RATE_165:
> diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> index b9397d9363c5..e0508990df48 100644
> --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
> @@ -289,6 +289,9 @@ struct bdb_general_features {
>  #define HDMI_MAX_DATA_RATE_PLATFORM	0			/* 204 */
>  #define HDMI_MAX_DATA_RATE_297		1			/* 204 */
>  #define HDMI_MAX_DATA_RATE_165		2			/* 204 */
> +#define HDMI_MAX_DATA_RATE_594		3			/* 249 */
> +#define HDMI_MAX_DATA_RATE_340		4			/* 249 */
> +#define HDMI_MAX_DATA_RATE_300		5			/* 249 */
>  
>  #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33
>  
> -- 
> 2.17.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 40b5e7ed12c2..a559a1914588 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1955,6 +1955,12 @@  static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
 		fallthrough;
 	case HDMI_MAX_DATA_RATE_PLATFORM:
 		return 0;
+	case HDMI_MAX_DATA_RATE_594:
+		return 594000;
+	case HDMI_MAX_DATA_RATE_340:
+		return 340000;
+	case HDMI_MAX_DATA_RATE_300:
+		return 300000;
 	case HDMI_MAX_DATA_RATE_297:
 		return 297000;
 	case HDMI_MAX_DATA_RATE_165:
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index b9397d9363c5..e0508990df48 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -289,6 +289,9 @@  struct bdb_general_features {
 #define HDMI_MAX_DATA_RATE_PLATFORM	0			/* 204 */
 #define HDMI_MAX_DATA_RATE_297		1			/* 204 */
 #define HDMI_MAX_DATA_RATE_165		2			/* 204 */
+#define HDMI_MAX_DATA_RATE_594		3			/* 249 */
+#define HDMI_MAX_DATA_RATE_340		4			/* 249 */
+#define HDMI_MAX_DATA_RATE_300		5			/* 249 */
 
 #define LEGACY_CHILD_DEVICE_CONFIG_SIZE		33