| Message ID | 20220303223737.708659-3-John.C.Harrison@Intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Improve anti-pre-emption w/a for compute workloads | expand |
On Thu, Mar 03, 2022 at 02:37:35PM -0800, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > An earlier patch added support for compute engines. However, it missed > enabling the anti-pre-emption w/a for the new engine class. So move > the 'compute capable' flag earlier and use it for the pre-emption w/a > test. > > Fixes: c674c5b9342e ("drm/i915/xehp: CCS should use RCS setup functions") > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com> > Cc: Matt Roper <matthew.d.roper@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> > Cc: Lucas De Marchi <lucas.demarchi@intel.com> > Cc: John Harrison <John.C.Harrison@Intel.com> > Cc: Jason Ekstrand <jason@jlekstrand.net> > Cc: "Michał Winiarski" <michal.winiarski@intel.com> > Cc: Matthew Brost <matthew.brost@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> > Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> > Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com> > Cc: Stuart Summers <stuart.summers@intel.com> > Cc: Matthew Auld <matthew.auld@intel.com> > Cc: Jani Nikula <jani.nikula@intel.com> > Cc: Ramalingam C <ramalingam.c@intel.com> > Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c > index 22e70e4e007c..4185c7338581 100644 > --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c > +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c > @@ -421,6 +421,12 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, > engine->logical_mask = BIT(logical_instance); > __sprint_engine_name(engine); > > + /* features common between engines sharing EUs */ > + if (engine->class == RENDER_CLASS || engine->class == COMPUTE_CLASS) { > + engine->flags |= I915_ENGINE_HAS_RCS_REG_STATE; > + engine->flags |= I915_ENGINE_HAS_EU_PRIORITY; > + } > + > engine->props.heartbeat_interval_ms = > CONFIG_DRM_I915_HEARTBEAT_INTERVAL; > engine->props.max_busywait_duration_ns = > @@ -433,15 +439,9 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, > CONFIG_DRM_I915_TIMESLICE_DURATION; > > /* Override to uninterruptible for OpenCL workloads. */ > - if (GRAPHICS_VER(i915) == 12 && engine->class == RENDER_CLASS) > + if (GRAPHICS_VER(i915) == 12 && (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE)) > engine->props.preempt_timeout_ms = 0; > > - /* features common between engines sharing EUs */ > - if (engine->class == RENDER_CLASS || engine->class == COMPUTE_CLASS) { > - engine->flags |= I915_ENGINE_HAS_RCS_REG_STATE; > - engine->flags |= I915_ENGINE_HAS_EU_PRIORITY; > - } > - > /* Cap properties according to any system limits */ > #define CLAMP_PROP(field) \ > do { \ > -- > 2.25.1 >
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 22e70e4e007c..4185c7338581 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -421,6 +421,12 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, engine->logical_mask = BIT(logical_instance); __sprint_engine_name(engine); + /* features common between engines sharing EUs */ + if (engine->class == RENDER_CLASS || engine->class == COMPUTE_CLASS) { + engine->flags |= I915_ENGINE_HAS_RCS_REG_STATE; + engine->flags |= I915_ENGINE_HAS_EU_PRIORITY; + } + engine->props.heartbeat_interval_ms = CONFIG_DRM_I915_HEARTBEAT_INTERVAL; engine->props.max_busywait_duration_ns = @@ -433,15 +439,9 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, CONFIG_DRM_I915_TIMESLICE_DURATION; /* Override to uninterruptible for OpenCL workloads. */ - if (GRAPHICS_VER(i915) == 12 && engine->class == RENDER_CLASS) + if (GRAPHICS_VER(i915) == 12 && (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE)) engine->props.preempt_timeout_ms = 0; - /* features common between engines sharing EUs */ - if (engine->class == RENDER_CLASS || engine->class == COMPUTE_CLASS) { - engine->flags |= I915_ENGINE_HAS_RCS_REG_STATE; - engine->flags |= I915_ENGINE_HAS_EU_PRIORITY; - } - /* Cap properties according to any system limits */ #define CLAMP_PROP(field) \ do { \