diff mbox series

drm/i915/dsi: power on panel before enabling DPHY

Message ID 20220317100055.16570-1-william.tseng@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dsi: power on panel before enabling DPHY | expand

Commit Message

William Tseng March 17, 2022, 10 a.m. UTC 
This change is to power on panel before DPHY enters the lane state
LP-11. Some panel needs this to meet its specifcation.

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Lee Shawn C <shawn.c.lee@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Signed-off-by: William Tseng <william.tseng@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 5781e9fac8b4..b766057c95f5 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1194,8 +1194,6 @@  static void gen11_dsi_powerup_panel(struct intel_encoder *encoder)
 	}
 
 	/* panel power on related mipi dsi vbt sequences */
-	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
-	intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay);
 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
 	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
@@ -1221,13 +1219,19 @@  static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
 				 const struct intel_crtc_state *pipe_config,
 				 const struct drm_connector_state *conn_state)
 {
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
+
 	/* step3b */
 	gen11_dsi_map_pll(encoder, pipe_config);
 
+	/* for mipi dsi vbt sequence to powerup panel */
+	intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
+	intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay);
+
 	/* step4: enable DSI port and DPHY */
 	gen11_dsi_enable_port_and_phy(encoder, pipe_config);
 
-	/* step5: program and powerup panel */
+	/* step5: program panel */
 	gen11_dsi_powerup_panel(encoder);
 
 	intel_dsc_dsi_pps_write(encoder, pipe_config);