From patchwork Fri Mar 18 22:46:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andi Shyti X-Patchwork-Id: 12785991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 962F5C433F5 for ; Fri, 18 Mar 2022 22:48:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7B95610E307; Fri, 18 Mar 2022 22:48:18 +0000 (UTC) Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id D889D10E2FE; Fri, 18 Mar 2022 22:48:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647643696; x=1679179696; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=riStR/wQrtiANxq2/Tqd9az8rpd803VBnSYdg8mR9K0=; b=ZJvP1HlEMQv+UZd+FbLSHbI8Sh/Td1hzac2TqPQiIYmwSLG/oWqkOqpt WuuzheBLqj0rG3mnqgTNFF0mDYbl7qg59rbE4cfmv/R1nrUWlZrI6p4ij 5yAdfr6kRAKOTyxweRwgGUzW4fbauVmyiqWyXq1E3x3E0+3YKhhGUn1F2 VHOMZHmkObGk/0vsKiYW6acww0MEvB9nQ9QuYaQE13MCHCJFw0HHpfl9y fCixA3rF0hzF0qo/k1EYGNjnJVRF4NlZ2bGP9vkxtMNcCcvl2GZmlSxoG YW5Xw+cX7L+Wv+Sx3UM4XdRPctncXO/f1WKuL1XMS6H5xQr3IhK2lfA9g A==; X-IronPort-AV: E=McAfee;i="6200,9189,10290"; a="237851563" X-IronPort-AV: E=Sophos;i="5.90,192,1643702400"; d="scan'208";a="237851563" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2022 15:48:16 -0700 X-IronPort-AV: E=Sophos;i="5.90,192,1643702400"; d="scan'208";a="647668633" Received: from mriahix-mobl2.ger.corp.intel.com (HELO intel.com) ([10.249.39.167]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Mar 2022 15:48:09 -0700 From: Andi Shyti To: Intel GFX , DRI Devel Date: Sat, 19 Mar 2022 00:46:37 +0200 Message-Id: <20220318224640.61594-5-andi.shyti@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220318224640.61594-1-andi.shyti@linux.intel.com> References: <20220318224640.61594-1-andi.shyti@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v6 4/7] drm/i915/gt: create per-tile sysfs interface X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lucas De Marchi , Chris Wilson , Matthew Auld Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Now that we have tiles we want each of them to have its own interface. A directory "gt/" is created under "cardN/" that will contain as many diroctories as the tiles. In the coming patches tile related interfaces will be added. For now the sysfs gt structure simply has an id interface related to the current tile count. The directory structure will follow this scheme: /sys/.../card0 └── gt    ├── gt0    │   └── id : : └─- gtN       └── id This new set of interfaces will be a basic tool for system managers and administrators when using i915. Signed-off-by: Andi Shyti Cc: Matt Roper Cc: Sujaritha Sundaresan Cc: Tvrtko Ursulin Reviewed-by: Sujaritha Sundaresan --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gt/intel_gt.c | 2 + drivers/gpu/drm/i915/gt/intel_gt_sysfs.c | 103 +++++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_sysfs.h | 34 ++++++++ drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/i915_sysfs.c | 7 +- drivers/gpu/drm/i915/i915_sysfs.h | 3 + scripts/extract-cert | Bin 0 -> 17952 bytes 8 files changed, 151 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_sysfs.c create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_sysfs.h create mode 100755 scripts/extract-cert GIT binary patch literal 17952 zcmeHPeQ;dWb-$7PoI6BlrvSGy~FVYMrE z-(s6kFp=$a5h4z0NlMxdv>BI%nbf5%Nt_NAn3|6i#&#ze6+%&{32*tZRlrn%nC2&gku4do4=XcLJ_uP+n-+TAHqx(7|E32!j1g9FYLJ&88kwSvHVDk!{ z0SSs_Viu0`#AV_f@Y5uw%7coaRHf1CN?ND!8c@<}pv)xncNHv{vWG-T&n-Q1o+@D~ z>J?9VwUpJoldjf|G3D}deLhk~^2uYFwrKyE+V!Y!Mw^xVXlo_)X}yh_vL1C8=~-IO z(t1qC$sr`B+@I7Z^joIwIjIk2lzj3igj0|GaMBJf&y?z*)bq9(|4r&!r}ZX$(u{D@ z+Y~IAa(#aQJ?fYLZQ^0>*7doK!vZ}&ndFzZJWGSLfDewtxG?wv(P?PhUEJ)@Xoj zkPgXEB6;nS zUGR(x{(Tqx78m?V7o7UoH;JG7fKBHA)h_aNF806dV&{)s)?-m#N$6Vx}06rf&&h#+w^Tk{tLaKz< zH(?lC`ZH-GXGXK8VF;sZ{c0ng$R@TVb7msDesy~)lTNIU_NEf5Y|@g>?rvisk+{Q1 zMRTT+$YwKHkz5=%HZEzo*62-U#M*V8YkGPjMlzi=jaYWafSD1UYgTow=`>QAXx!+{ zCsSrJZ6wlLlIcWFlnp9dZCz`PbYh#)mxLSA=$3?O5)+uQLL^_H;G!w=Gh^U*bcBSGmuCNNT*}{14PYCO7z82nOs7^cp`llKy-gr^li%~ z&4lP1Kr_rf3{z}-6zxw(Q^~tA6mXz7rbn$mnoJAgWxvuI9PkGuK>4NR&JP#?qeZNW zbhWh`i~WoJOE49xu$tE3M}IZ=tI|J((UDN~cP4*ErwSS`VQ%p{R6nmD%W#c24vZ3& zzoyHH&(BSsODp(?x}2~3JRgtDCMhAt^mU!_y&4}6%Hs0%nfcKh6i(LwZCV0jHk`^h zSvDLFmD9KlpIJtQn6TmVY&f4!be;3r@P?pbri0k8S3Vogw>BiXz=qRxk5fxf<;ae_ zKhp)vY&ey13IPCJ7tL;hT#F(Q8)R1D!4s;oTj4Jw9keM>HZZ`p7?btL|n4WA%v2|uPnk6x_iW|E*%LEK3{jJTv2JsTPP|u9mml-FNhrRTdBM_Rzhle zjd;2w6^}^%81dD_k4XMy;^|UQ+%Ng(h^I?H@iECCAfA@~;$F!=MLb=~iaRC$UE*o^ zD-KBhuZX9mzqncQj}lLpxZ*m=KTP}#;)9ZZfOxvp6@X0|MBVI{qoj*(p9=b;~hCpYgQg)aCQ9=ffu?%-E}T6fE;q0~oJ z58cyPXMI)H*LtKG#n-_+PNDk1$gP_~w;e(wVdoaIb2;oBd`LFnkadl+l5c)5?VZ;_ zevX(oS@%*^$axPwN>$y5zChvk{oQk4OLQyMpTLWk=} zKs7ux>migJz)w7*I=HnHepn6AR+I5B$-wZEpV&07BF*6?RS;xj4dllltXL;#2!@yZ z&?f(xGVzoRvH)@W0v~i0j(#bOP8d8szHWVFxOO>>#PFz8{ z47VP=ib`rlOdq3bdJtpAbsvQKxm_Cr_XuiAhS?uH~f{B85R@KEat;MT=( z(Tc;(!?m5@t2RNmLch2Th1#DDJvieVtS0IeIP41#ry8e)hcTN~z2U+MnojvoWqE!a zQ@7#PO^3?!A+(|JDSG(dvA_mKLg=riH;{$Z```Z-IX2XKfSOXaYTbdF-upsXKZ26_ zaBLz{IAIN-l8&K{#%YnlyOF{#!b6cpEEBCeU;xu_F}bL`dFPjOGUpG4?|+^up%W=Y ztwcXzHM2HqXKOYc+FLleskl)#SIu9ncj3ZmcsEMk4YpoK-RIp!=Q}29SK+vIBeV~^ z2%cOhykI?w%HYL?)C@Rz35qejKPD6%Hsjz1h+3y;dHKM+bEx+9g;+91@?Q8xRnR$3 z*F{+Pdz7fN>nN5mv}iN=X%~b4kb4|*=+b=4pNg?B=wi{1`ORXp7w+ zTiz63K0`G7@Fv68lv_@}ruYo8tyeVRmBn^58;zNXxG$E-np8MLw1}J9HgrWgjGH^V z+t&7UGTYO&YK^h3YmFGVBbEyUmTM{^co*VZcT;=M6@h?Hy-eWu2=bjmPr@u0lX_%r zsKaRQ>|SrQukVhCRVd!*$2%8aUpCXvk|NuS`@&pwOJcb%7t1CG%-o`ca<-XV^BF3g7kdM9y3>g9fAOlA7!29WyZtPL@hffR2urN=HB~(C^^MV&bDxX*=;BGg!uKInGX zrki|DlgkUy2mvX7qEyDWLnPPcsUNOh?P++hChYO; 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intel_gt_debugfs_register(gt); + intel_gt_sysfs_register(gt); } static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c new file mode 100644 index 0000000000000..d508319612944 --- /dev/null +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c @@ -0,0 +1,103 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2022 Intel Corporation + */ + +#include +#include +#include +#include +#include + +#include "i915_drv.h" +#include "i915_sysfs.h" +#include "intel_gt.h" +#include "intel_gt_sysfs.h" +#include "intel_gt_types.h" +#include "intel_rc6.h" + +bool is_object_gt(struct kobject *kobj) +{ + return !strncmp(kobj->name, "gt", 2); +} + +static struct intel_gt *kobj_to_gt(struct kobject *kobj) +{ + return container_of(kobj, struct kobj_gt, base)->gt; +} + +struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev, + const char *name) +{ + struct kobject *kobj = &dev->kobj; + + /* + * We are interested at knowing from where the interface + * has been called, whether it's called from gt/ or from + * the parent directory. + * From the interface position it depends also the value of + * the private data. + * If the interface is called from gt/ then private data is + * of the "struct intel_gt *" type, otherwise it's * a + * "struct drm_i915_private *" type. + */ + if (!is_object_gt(kobj)) { + struct drm_i915_private *i915 = kdev_minor_to_i915(dev); + + return to_gt(i915); + } + + return kobj_to_gt(kobj); +} + +static ssize_t id_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + struct intel_gt *gt = intel_gt_sysfs_get_drvdata(dev, attr->attr.name); + + return sysfs_emit(buf, "%u\n", gt->info.id); +} +static DEVICE_ATTR_RO(id); + +static struct attribute *id_attrs[] = { + &dev_attr_id.attr, + NULL, +}; +ATTRIBUTE_GROUPS(id); + +static void kobj_gt_release(struct kobject *kobj) +{ + kfree(kobj); +} + +static struct kobj_type kobj_gt_type = { + .release = kobj_gt_release, + .sysfs_ops = &kobj_sysfs_ops, + .default_groups = id_groups, +}; + +void intel_gt_sysfs_register(struct intel_gt *gt) +{ + struct kobj_gt *kg; + + kg = kzalloc(sizeof(*kg), GFP_KERNEL); + if (!kg) + goto exit_fail; + + kobject_init(&kg->base, &kobj_gt_type); + kg->gt = gt; + + /* xfer ownership to sysfs tree */ + if (kobject_add(&kg->base, gt->i915->sysfs_gt, "gt%d", gt->info.id)) + goto exit_kobj_put; + + return; + +exit_kobj_put: + kobject_put(&kg->base); + +exit_fail: + drm_warn(>->i915->drm, + "failed to initialize gt%d sysfs root\n", gt->info.id); +} diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.h b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.h new file mode 100644 index 0000000000000..9471b26752cfc --- /dev/null +++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2022 Intel Corporation + */ + +#ifndef __SYSFS_GT_H__ +#define __SYSFS_GT_H__ + +#include +#include + +#include "i915_gem.h" /* GEM_BUG_ON() */ + +struct intel_gt; + +struct kobj_gt { + struct kobject base; + struct intel_gt *gt; +}; + +bool is_object_gt(struct kobject *kobj); + +struct drm_i915_private *kobj_to_i915(struct kobject *kobj); + +struct kobject * +intel_gt_create_kobj(struct intel_gt *gt, + struct kobject *dir, + const char *name); + +void intel_gt_sysfs_register(struct intel_gt *gt); +struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev, + const char *name); + +#endif /* SYSFS_GT_H */ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index fa2631d9b87cd..62284263cbc52 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -783,6 +783,8 @@ struct drm_i915_private { #define I915_MAX_GT 4 struct intel_gt *gt[I915_MAX_GT]; + struct kobject *sysfs_gt; + struct { struct i915_gem_contexts { spinlock_t lock; /* locks list */ diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index a4d1759375b9d..5ff915b93c21a 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -39,7 +39,7 @@ #include "i915_sysfs.h" #include "intel_pm.h" -static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev) +struct drm_i915_private *kdev_minor_to_i915(struct device *kdev) { struct drm_minor *minor = dev_get_drvdata(kdev); return to_i915(minor->dev); @@ -538,6 +538,11 @@ void i915_setup_sysfs(struct drm_i915_private *dev_priv) if (ret) drm_err(&dev_priv->drm, "RPS sysfs setup failed\n"); + dev_priv->sysfs_gt = kobject_create_and_add("gt", &kdev->kobj); + if (!dev_priv->sysfs_gt) + drm_warn(&dev_priv->drm, + "failed to register GT sysfs directory\n"); + i915_setup_error_capture(kdev); intel_engines_add_sysfs(dev_priv); diff --git a/drivers/gpu/drm/i915/i915_sysfs.h b/drivers/gpu/drm/i915/i915_sysfs.h index 41afd4366416a..243a17741e3f1 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.h +++ b/drivers/gpu/drm/i915/i915_sysfs.h @@ -6,8 +6,11 @@ #ifndef __I915_SYSFS_H__ #define __I915_SYSFS_H__ +struct device; struct drm_i915_private; +struct drm_i915_private *kdev_minor_to_i915(struct device *kdev); + void i915_setup_sysfs(struct drm_i915_private *i915); void i915_teardown_sysfs(struct drm_i915_private *i915); diff --git a/scripts/extract-cert b/scripts/extract-cert new file mode 100755 index 0000000000000000000000000000000000000000..fe0a96aa5eb9288ba52bc056da46daef5befa7b8