From patchwork Thu Mar 24 12:04:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Shankar, Uma" X-Patchwork-Id: 12790634 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A9F1C433F5 for ; Thu, 24 Mar 2022 12:03:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D308B10E8A6; Thu, 24 Mar 2022 12:03:18 +0000 (UTC) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id AAB8310E8A6 for ; Thu, 24 Mar 2022 12:03:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648123397; x=1679659397; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=aGi0ip+eGtcaDbTw97kZnTYV/T+m1GIfrNHD9HfLcCE=; b=SqmW92OMVrIumTQvWN/cK1A8K+0SvsGWNXgXa5Ksp7QP7u8BxjsdU/Rw RDaVD9z59XdCA0BRUuCQOwvw/GTuOQIV7/oOdmbZGJaPZM5Jor5XrmKw1 aSCp8dg9jiQFP3dkMYY7bRYbFQfNefP4I3bJjHWpVPeOdAMM+Tvb2np6S 7PkkrP+wyfY+71XRhM+3VAAzJkBzvKN9lM+VQoBGMm2fQGY1IircqyRrg qCJ7CqkQqucwJtWbJfh5n4F2Fzf+CpVZZvAw1TiNAFXaN2x/irHaBw+xd 9MettnaujYZp4ryRii79TRwOVpqpRKVAW7/GHYaM/4gaMzBHswmaMHQLY Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10295"; a="257187984" X-IronPort-AV: E=Sophos;i="5.90,207,1643702400"; d="scan'208";a="257187984" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2022 05:03:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,207,1643702400"; d="scan'208";a="516144872" Received: from cfl-desktop.iind.intel.com ([10.190.239.20]) by orsmga002.jf.intel.com with ESMTP; 24 Mar 2022 05:03:08 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org Date: Thu, 24 Mar 2022 17:34:38 +0530 Message-Id: <20220324120438.1876445-1-uma.shankar@intel.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Subject: [Intel-gfx] [v4] drm/i915/display: Extend DP HDR support to hsw+ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" HSW+ platforms are able to send out HDR Metadata SDP DIP packet as GMP. Hence, extending the support for HDR on DP encoders for the same. v2: Limited to non eDP ports on hsw/bdw and removed it for lspcon as it is done separately (suggested by Ville) v3: Added helper and limited eDP restriction to port A (Ville) v4: Dropped some redundant checks (Ville) Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5389 Cc: Ville Syrjälä Signed-off-by: Uma Shankar Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 9e19165fd175..fdcb169adb54 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -4913,6 +4913,25 @@ bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port) return intel_bios_is_port_edp(dev_priv, port); } +static bool +has_gamut_metadata_dip(struct drm_i915_private *i915, enum port port) +{ + if (intel_bios_is_lspcon_present(i915, port)) + return false; + + if (DISPLAY_VER(i915) >= 11) + return true; + + if (port == PORT_A) + return false; + + if (IS_HASWELL(i915) || IS_BROADWELL(i915) || + DISPLAY_VER(i915) >= 9) + return true; + + return false; +} + static void intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) { @@ -4939,7 +4958,7 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect intel_attach_dp_colorspace_property(connector); } - if (IS_GEMINILAKE(dev_priv) || DISPLAY_VER(dev_priv) >= 11) + if (has_gamut_metadata_dip(dev_priv, port)) drm_object_attach_property(&connector->base, connector->dev->mode_config.hdr_output_metadata_property, 0);