From patchwork Wed Mar 30 14:31:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Souza, Jose" X-Patchwork-Id: 12795877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FD7FC433F5 for ; Wed, 30 Mar 2022 14:30:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D4E6F10E1E6; Wed, 30 Mar 2022 14:30:32 +0000 (UTC) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by gabe.freedesktop.org (Postfix) with ESMTPS id 39B6A10E1E6 for ; Wed, 30 Mar 2022 14:30:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648650629; x=1680186629; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zkfB32ZIt9le4go58oiKuJchQv4WQoI0xn7BC0c0ls0=; b=Lb3mJh1dV4wK9qS6Mq6LXajOwaJesbxeURwV8SvbGajPchuIVfaDHvtI oYs+AnTk0A3FUg5r5SezvqKf0DgF6ESZJed4684BU8hVskFmh6AJFOWMl P2oL6AHPOVe+SRraTjvwrh5jZ4wr9b9AJCui9wdbdCmgHnvpLyz4+ZNwT R7bIQER6Rre8hmZnvHBAZ5E057H7UpgbJifwnPr3CaHxY8dUdyyXw7ylx +VkJZuz7SwI6vnbF64U6zB2Zimp/S5ls5LEOz/FfVuuEQBFGwEahHy1mK r+BEfQdKsaQQcQLqTWyz3lGFB4Wod96K1spjhJiQbJxeLw6Hh3lD1jsT1 g==; X-IronPort-AV: E=McAfee;i="6200,9189,10301"; a="241711261" X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="241711261" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:30:26 -0700 X-IronPort-AV: E=Sophos;i="5.90,222,1643702400"; d="scan'208";a="653851221" Received: from josouza-mobl2.fso.intel.com (HELO josouza-mobl2.intel.com) ([10.230.19.149]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 07:30:24 -0700 From: =?utf-8?q?Jos=C3=A9_Roberto_de_Souza?= To: intel-gfx@lists.freedesktop.org Date: Wed, 30 Mar 2022 07:31:34 -0700 Message-Id: <20220330143136.84930-2-jose.souza@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330143136.84930-1-jose.souza@intel.com> References: <20220330143136.84930-1-jose.souza@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH CI 2/4] drm/i915/display/adlp: Adjust MBUS DBOX BW and B credits X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Caz Yokoyama Alderlake-P has different MBUS DBOX BW and B credits than other platforms, so here setting it properly. BSpec: 49213 BSpec: 50343 Cc: Matt Roper Cc: Stanislav Lisovskiy Cc: Jani Nikula Cc: Ville Syrjälä Reviewed-by: Ville Syrjälä Signed-off-by: Caz Yokoyama Signed-off-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_display.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 8501929bca3aa..e5f12f2040af8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1845,7 +1845,10 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc, bool joined_mbus) else val |= MBUS_DBOX_A_CREDIT(2); - if (DISPLAY_VER(dev_priv) >= 12) { + if (IS_ALDERLAKE_P(dev_priv)) { + val |= MBUS_DBOX_BW_CREDIT(2); + val |= MBUS_DBOX_B_CREDIT(8); + } else if (DISPLAY_VER(dev_priv) >= 12) { val |= MBUS_DBOX_BW_CREDIT(2); val |= MBUS_DBOX_B_CREDIT(12); } else {