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[35.199.25.115]) by smtp.gmail.com with ESMTPSA id p7-20020a05620a22a700b0069c37e2c473sm647143qkh.94.2022.04.11.13.48.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 13:48:20 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, jani.nikula@intel.com, intel-gfx@lists.freedesktop.org, freedreno@lists.freedesktop.org, rodrigo.vivi@intel.com Date: Mon, 11 Apr 2022 20:47:38 +0000 Message-Id: <20220411204741.1074308-10-sean@poorly.run> X-Mailer: git-send-email 2.35.1.1178.g4f1659d476-goog In-Reply-To: <20220411204741.1074308-1-sean@poorly.run> References: <20220411204741.1074308-1-sean@poorly.run> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v5 09/10] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, markyacoub@chromium.org, abhinavk@codeaurora.org, swboyd@chromium.org, Rob Herring , Andy Gross , Sean Paul , linux-arm-msm@vger.kernel.org, Krzysztof Kozlowski , bjorn.andersson@linaro.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul This patch adds the register ranges required for HDCP key injection and HDCP TrustZone interaction as described in the dt-bindings for the sc7180 dp controller. Now that these are supported, change the compatible string to "dp-hdcp". Signed-off-by: Sean Paul Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-15-sean@poorly.run #v1 Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-14-sean@poorly.run #v2 Link: https://patchwork.freedesktop.org/patch/msgid/20211001151145.55916-14-sean@poorly.run #v3 Link: https://patchwork.freedesktop.org/patch/msgid/20211105030434.2828845-14-sean@poorly.run #v4 Changes in v3: -Split off into a new patch containing just the dts change (Stephen) -Add hdcp compatible string (Stephen) Changes in v4: -Rebase on Bjorn's multi-dp patchset Changes in v5: -Put the tz register offsets in trogdor dtsi (Rob C) --- arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi | 8 ++++++++ arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 +++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi index 732e1181af48..c3559253aefc 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor.dtsi @@ -815,6 +815,14 @@ &mdss_dp { data-lanes = <0 1>; vdda-1p2-supply = <&vdda_usb_ss_dp_1p2>; vdda-0p9-supply = <&vdda_usb_ss_dp_core>; + + reg = <0 0x0ae90000 0 0x200>, + <0 0x0ae90200 0 0x200>, + <0 0x0ae90400 0 0xc00>, + <0 0x0ae91000 0 0x400>, + <0 0x0ae91400 0 0x400>, + <0 0x0aed1000 0 0x175>, + <0 0x0aee1000 0 0x2c>; }; &pm6150_adc { diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index e1c46b80f14a..3c3eef7a7d52 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3089,7 +3089,11 @@ mdss_dp: displayport-controller@ae90000 { compatible = "qcom,sc7180-dp"; status = "disabled"; - reg = <0 0x0ae90000 0 0x1400>; + reg = <0 0x0ae90000 0 0x200>, + <0 0x0ae90200 0 0x200>, + <0 0x0ae90400 0 0xc00>, + <0 0x0ae91000 0 0x400>, + <0 0x0ae91400 0 0x400>; interrupt-parent = <&mdss>; interrupts = <12>;