From patchwork Mon Apr 25 21:12:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Roper X-Patchwork-Id: 12826267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 607F9C433F5 for ; Mon, 25 Apr 2022 21:13:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CBD4010E1BC; Mon, 25 Apr 2022 21:13:08 +0000 (UTC) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE25710E1BC; Mon, 25 Apr 2022 21:13:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1650921188; x=1682457188; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=J7wogVNf6rSHogt48eW3Yd6FMehrNK1l+GBCh9ZIIXQ=; b=VCq3yjgK3gT6Z+5ofnkRzceOCJNJkxf3W2/IqQpo7gJYigoOj1XTNosu Zvcx89CeaAtbyJv+ecjLrKPhgl5aWJnd3Q3e05KlyeKNTjZSsdXZ/3tR5 J3/w3k14fK16fsWqc3vShP5Yjqrs6hVRDDvGEeZKXkcVMUjg7Dd/pXxin 1/Ubw492Er4iM5vZAddY35jdQs9eSZctfdAWAcPcU9Y7UiZBE3iWrpMYf 7H41D2D3ViEydDfBNUoake8z6xF2wSYfZFSF22K5zHIE5fqWwC7hVdiMy N1QFGbNSTf01q9oKgmLJS+tcgCaK2zf7YSVSisF2GHSs3ZyiJgZMKYLFM A==; X-IronPort-AV: E=McAfee;i="6400,9594,10328"; a="265531325" X-IronPort-AV: E=Sophos;i="5.90,289,1643702400"; d="scan'208";a="265531325" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 14:12:59 -0700 X-IronPort-AV: E=Sophos;i="5.90,289,1643702400"; d="scan'208";a="729916088" Received: from mdroper-desk1.fm.intel.com ([10.1.27.134]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Apr 2022 14:12:58 -0700 From: Matt Roper To: intel-gfx@lists.freedesktop.org Date: Mon, 25 Apr 2022 14:12:50 -0700 Message-Id: <20220425211251.77154-3-matthew.d.roper@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220425211251.77154-1-matthew.d.roper@intel.com> References: <20220425211251.77154-1-matthew.d.roper@intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH v2 2/3] drm/i915: Add first set of DG2 PCI IDs X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Lucas De Marchi , dri-devel@lists.freedesktop.org, Rodrigo Vivi , Dave Airlie Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The IDs added here are the subset reserved for 'motherboard down' designs of DG2. We have all the necessary support upstream to enable these now (although they'll continue to require force_probe until the usual requirements are met). The remaining DG2 IDs for add-in cards will come in a future patch once some additional required functionality has fully landed. Bspec: 44477 Cc: Lucas De Marchi Cc: Daniel Vetter Cc: Dave Airlie Cc: Rodrigo Vivi Cc: Joonas Lahtinen Cc: Jani Nikula Cc: Tvrtko Ursulin Signed-off-by: Matt Roper Reviewed-by: Lucas De Marchi --- drivers/gpu/drm/i915/i915_pci.c | 2 +- drivers/gpu/drm/i915/intel_device_info.c | 21 +++++++++++++++++++++ include/drm/i915_pciids.h | 22 ++++++++++++++++++++++ 3 files changed, 44 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index a3a1b4cb2942..1d44f57c2eb0 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -1058,7 +1058,6 @@ static const struct intel_device_info xehpsdv_info = { BIT(VECS0) | BIT(VECS1) | \ BIT(VCS0) | BIT(VCS2) -__maybe_unused static const struct intel_device_info dg2_info = { DG2_FEATURES, XE_LPD_FEATURES, @@ -1154,6 +1153,7 @@ static const struct pci_device_id pciidlist[] = { INTEL_DG1_IDS(&dg1_info), INTEL_RPLS_IDS(&adl_s_info), INTEL_RPLP_IDS(&adl_p_info), + INTEL_DG2_IDS(&dg2_info), {0, 0, 0} }; MODULE_DEVICE_TABLE(pci, pciidlist); diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 74c3ffb66b8d..cefa9ed784ff 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -186,6 +186,18 @@ static const u16 subplatform_rpl_ids[] = { INTEL_RPLP_IDS(0), }; +static const u16 subplatform_g10_ids[] = { + INTEL_DG2_G10_IDS(0), +}; + +static const u16 subplatform_g11_ids[] = { + INTEL_DG2_G11_IDS(0), +}; + +static const u16 subplatform_g12_ids[] = { + INTEL_DG2_G12_IDS(0), +}; + static bool find_devid(u16 id, const u16 *p, unsigned int num) { for (; num; num--, p++) { @@ -231,6 +243,15 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915) } else if (find_devid(devid, subplatform_rpl_ids, ARRAY_SIZE(subplatform_rpl_ids))) { mask = BIT(INTEL_SUBPLATFORM_RPL); + } else if (find_devid(devid, subplatform_g10_ids, + ARRAY_SIZE(subplatform_g10_ids))) { + mask = BIT(INTEL_SUBPLATFORM_G10); + } else if (find_devid(devid, subplatform_g11_ids, + ARRAY_SIZE(subplatform_g11_ids))) { + mask = BIT(INTEL_SUBPLATFORM_G11); + } else if (find_devid(devid, subplatform_g12_ids, + ARRAY_SIZE(subplatform_g12_ids))) { + mask = BIT(INTEL_SUBPLATFORM_G12); } GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK); diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index a7b5eea7ffaa..283dadfbb4db 100644 --- a/include/drm/i915_pciids.h +++ b/include/drm/i915_pciids.h @@ -692,4 +692,26 @@ INTEL_VGA_DEVICE(0xA7A8, info), \ INTEL_VGA_DEVICE(0xA7A9, info) +/* DG2 */ +#define INTEL_DG2_G10_IDS(info) \ + INTEL_VGA_DEVICE(0x5690, info), \ + INTEL_VGA_DEVICE(0x5691, info), \ + INTEL_VGA_DEVICE(0x5692, info) + +#define INTEL_DG2_G11_IDS(info) \ + INTEL_VGA_DEVICE(0x5693, info), \ + INTEL_VGA_DEVICE(0x5694, info), \ + INTEL_VGA_DEVICE(0x5695, info), \ + INTEL_VGA_DEVICE(0x56B0, info) + +#define INTEL_DG2_G12_IDS(info) \ + INTEL_VGA_DEVICE(0x5696, info), \ + INTEL_VGA_DEVICE(0x5697, info), \ + INTEL_VGA_DEVICE(0x56B2, info) + +#define INTEL_DG2_IDS(info) \ + INTEL_DG2_G10_IDS(info), \ + INTEL_DG2_G11_IDS(info), \ + INTEL_DG2_G12_IDS(info) + #endif /* _I915_PCIIDS_H */